summaryrefslogtreecommitdiff
path: root/test/CodeGen/PowerPC/branch-hint.ll
diff options
context:
space:
mode:
authorHal Finkel <hfinkel@anl.gov>2015-12-12 00:32:00 +0000
committerHal Finkel <hfinkel@anl.gov>2015-12-12 00:32:00 +0000
commit8f2bcca5c759d0c46f86b852aa1747768e954d38 (patch)
treeeaca681aac97ede40438f8073008847066af3fff /test/CodeGen/PowerPC/branch-hint.ll
parent670d12555d5662b55e62a6ea43da25a627d5e6dd (diff)
[PowerPC] Add Branch Hints for Highly-Biased Branches
This branch adds hints for highly biased branches on the PPC architecture. Even in absence of profiling information, LLVM will mark code reaching unreachable terminators and other exceptional control flow constructs as highly unlikely to be reached. Patch by Tom Jablin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255398 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/branch-hint.ll')
-rw-r--r--test/CodeGen/PowerPC/branch-hint.ll135
1 files changed, 135 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/branch-hint.ll b/test/CodeGen/PowerPC/branch-hint.ll
new file mode 100644
index 00000000000..46160507105
--- /dev/null
+++ b/test/CodeGen/PowerPC/branch-hint.ll
@@ -0,0 +1,135 @@
+; RUN: llc < %s -O1 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -ppc-use-branch-hint=false | FileCheck %s
+; RUN: llc < %s -O1 -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -ppc-use-branch-hint=true | FileCheck %s -check-prefix=CHECK-HINT
+define void @branch_hint_1(i32 %src) {
+entry:
+ %cmp = icmp eq i32 %src, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ tail call void @foo() #0
+ unreachable
+
+if.end:
+ call void @goo()
+ ret void
+
+; CHECK-LABEL: branch_hint_1:
+; CHECK: beq
+
+; CHECK-HINT-LABEL: branch_hint_1:
+; CHECK-HINT: beq-
+}
+
+define void @branch_hint_2(i32 %src) {
+entry:
+ %cmp = icmp eq i32 %src, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ call void @goo()
+ ret void
+
+if.end:
+ tail call void @foo() #0
+ unreachable
+
+; CHECK-LABEL: @branch_hint_2
+; CHECK: bne
+
+; CHECK-HINT-LABEL: @branch_hint_2
+; CHECK-HINT: bne-
+}
+
+declare void @foo()
+attributes #0 = { noreturn }
+
+define void @branch_hint_3(i32 %src) {
+entry:
+ %cmp = icmp eq i32 %src, 0
+ br i1 %cmp, label %if.then, label %if.end, !prof !0
+
+if.then:
+ call void @foo()
+ ret void
+
+if.end:
+ call void @goo()
+ ret void
+
+; CHECK-LABEL: @branch_hint_3
+; CHECK: bne
+
+; CHECK-HINT-LABEL: @branch_hint_3
+; CHECK-HINT: bne
+}
+
+!0 = !{!"branch_weights", i32 64, i32 4}
+
+define void @branch_hint_4(i32 %src) {
+entry:
+ %cmp = icmp eq i32 %src, 0
+ br i1 %cmp, label %if.then, label %if.end, !prof !1
+
+if.then:
+ call void @foo()
+ ret void
+
+if.end:
+ call void @goo()
+ ret void
+
+; CHECK-HINT-LABEL: branch_hint_4
+; CHECK-HINT: bne
+}
+
+!1 = !{!"branch_weights", i32 64, i32 8}
+
+define void @branch_hint_5(i32 %src) {
+entry:
+ %cmp = icmp eq i32 %src, 0
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+ ret void
+
+if.end:
+ call void @goo()
+ ret void
+
+; CHECK-HINT-LABEL: branch_hint_5:
+; CHECK-HINT: beq
+}
+
+declare void @goo()
+
+define void @branch_hint_6(i32 %src1, i32 %src2, i32 %src3) {
+entry:
+ %cmp = icmp eq i32 %src1, 0
+ br i1 %cmp, label %if.end.6, label %if.end, !prof !3
+
+if.end:
+ %cmp1 = icmp eq i32 %src2, 0
+ br i1 %cmp1, label %if.end.3, label %if.then.2
+
+if.then.2:
+ tail call void @foo() #0
+ unreachable
+
+if.end.3:
+ %cmp4 = icmp eq i32 %src3, 1
+ br i1 %cmp4, label %if.then.5, label %if.end.6
+
+if.then.5:
+ tail call void @foo() #0
+ unreachable
+
+if.end.6:
+ ret void
+
+; CHECK-HINT-LABEL: branch_hint_6:
+; CHECK-HINT: bne
+; CHECK-HINT: bne-
+; CHECK-HINT: bne+
+}
+
+!3 = !{!"branch_weights", i32 64, i32 4}