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authorDan Gohman <gohman@apple.com>2007-07-09 20:59:04 +0000
committerDan Gohman <gohman@apple.com>2007-07-09 20:59:04 +0000
commit532dc2e1f2473b16b48566c1cbc9eefe94a4e58e (patch)
tree50f72c121d845216c758e8e2c55141123373570a /test/CodeGen/PowerPC/big-endian-call-result.ll
parent4d6f96d6997738419627ebe13dd6cb9c88a98fd7 (diff)
Change getCopyToParts and getCopyFromParts to always use target-endian
register ordering, for both physical and virtual registers. Update the PPC target lowering for calls to expect registers for the call result to already be in target order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/big-endian-call-result.ll')
-rw-r--r--test/CodeGen/PowerPC/big-endian-call-result.ll13
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/big-endian-call-result.ll b/test/CodeGen/PowerPC/big-endian-call-result.ll
new file mode 100644
index 00000000000..4885a623613
--- /dev/null
+++ b/test/CodeGen/PowerPC/big-endian-call-result.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addic 4, 4, 1}
+; RUN: llvm-as < %s | llc -march=ppc32 -mtriple=powerpc-unknown-linux-gnu | \
+; RUN: grep {addze 3, 3}
+
+declare i64 @foo();
+
+define i64 @bar()
+{
+ %t = call i64 @foo()
+ %s = add i64 %t, 1
+ ret i64 %s
+}