diff options
author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
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committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll | |
parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll')
-rw-r--r-- | test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll index 382ba1f6a82..bba3707c113 100644 --- a/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll +++ b/test/CodeGen/PowerPC/2007-05-22-tailmerge-3.ll @@ -15,7 +15,7 @@ entry: %retval = alloca i32, align 4 ; <i32*> [#uses=1] store i32 %i, i32* %i_addr store i32 %q, i32* %q_addr - %tmp = load i32* %i_addr ; <i32> [#uses=1] + %tmp = load i32, i32* %i_addr ; <i32> [#uses=1] %tmp1 = icmp ne i32 %tmp, 0 ; <i1> [#uses=1] %tmp12 = zext i1 %tmp1 to i8 ; <i8> [#uses=1] %toBool = icmp ne i8 %tmp12, 0 ; <i1> [#uses=1] @@ -24,7 +24,7 @@ entry: cond_true: ; preds = %entry %tmp3 = call i32 (...)* @bar( ) ; <i32> [#uses=0] %tmp4 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] - %tmp7 = load i32* %q_addr ; <i32> [#uses=1] + %tmp7 = load i32, i32* %q_addr ; <i32> [#uses=1] %tmp8 = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] %tmp89 = zext i1 %tmp8 to i8 ; <i8> [#uses=1] %toBool10 = icmp ne i8 %tmp89, 0 ; <i1> [#uses=1] @@ -33,7 +33,7 @@ cond_true: ; preds = %entry cond_false: ; preds = %entry %tmp5 = call i32 (...)* @foo( ) ; <i32> [#uses=0] %tmp6 = call i32 (...)* @baz( i32 5, i32 6 ) ; <i32> [#uses=0] - %tmp27 = load i32* %q_addr ; <i32> [#uses=1] + %tmp27 = load i32, i32* %q_addr ; <i32> [#uses=1] %tmp28 = icmp ne i32 %tmp27, 0 ; <i1> [#uses=1] %tmp289 = zext i1 %tmp28 to i8 ; <i8> [#uses=1] %toBool210 = icmp ne i8 %tmp289, 0 ; <i1> [#uses=1] @@ -54,7 +54,7 @@ cond_next18: ; preds = %cond_false15, %cond_true11 br label %return return: ; preds = %cond_next18 - %retval20 = load i32* %retval ; <i32> [#uses=1] + %retval20 = load i32, i32* %retval ; <i32> [#uses=1] ret i32 %retval20 } |