diff options
author | Sanjay Patel <spatel@rotateright.com> | 2017-02-24 17:17:33 +0000 |
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committer | Sanjay Patel <spatel@rotateright.com> | 2017-02-24 17:17:33 +0000 |
commit | 9a9478ccb0971d1d19a7a404d4edaab66096f94c (patch) | |
tree | 50ab8d36ac05b356171f219a075f96d4a54468a0 /test/CodeGen/NVPTX | |
parent | f64a815fb7999605336e27c64c4f443eb780444c (diff) |
[DAGCombiner] add missing folds for scalar select of {-1,0,1}
The motivation for filling out these select-of-constants cases goes back to D24480,
where we discussed removing an IR fold from add(zext) --> select. And that goes back to:
https://reviews.llvm.org/rL75531
https://reviews.llvm.org/rL159230
The idea is that we should always canonicalize patterns like this to a select-of-constants
in IR because that's the smallest IR and the best for value tracking. Note that we currently
do the opposite in some cases (like the cases in *this* patch). Ie, the proposed folds in
this patch already exist in InstCombine today:
https://github.com/llvm-mirror/llvm/blob/master/lib/Transforms/InstCombine/InstCombineSelect.cpp#L1151
As this patch shows, most targets generate better machine code for simple ext/add/not ops
rather than a select of constants. So the follow-up steps to make this less of a patchwork
of special-case folds and missing IR canonicalization:
1. Have DAGCombiner convert any select of constants into ext/add/not ops.
2 Have InstCombine canonicalize in the other direction (create more selects).
Differential Revision: https://reviews.llvm.org/D30180
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296137 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/NVPTX')
-rw-r--r-- | test/CodeGen/NVPTX/add-128bit.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/NVPTX/add-128bit.ll b/test/CodeGen/NVPTX/add-128bit.ll index 29e3cdffae7..a077c3fcf89 100644 --- a/test/CodeGen/NVPTX/add-128bit.ll +++ b/test/CodeGen/NVPTX/add-128bit.ll @@ -8,7 +8,7 @@ define void @foo(i64 %a, i64 %add, i128* %retptr) { ; CHECK: add.s64 ; CHECK: setp.lt.u64 ; CHECK: setp.lt.u64 -; CHECK: selp.b64 +; CHECK: selp.u64 ; CHECK: selp.b64 ; CHECK: add.s64 %t1 = sext i64 %a to i128 |