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| author | Craig Topper <craig.topper@intel.com> | 2017-12-15 19:01:51 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-15 19:01:51 +0000 |
| commit | 5386758b51802d0874f0c123491876fef721c0e2 (patch) | |
| tree | 05fb35927281a54c2d8b41200fe7d60af8911376 /test/CodeGen/NVPTX | |
| parent | 11e27ba376cf6f1ccb15de7b24700b8e6bc39cd5 (diff) | |
[X86] Add 'Requires<[In64BitMode]>' to a bunch of instructions that only have memory and immediate operands.
The asm parser wasn't preventing these from being accepted in 32-bit mode. Instructions that use a GR64 register are protected by the parser rejecting the register in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320846 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/NVPTX')
0 files changed, 0 insertions, 0 deletions