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| author | Simon Dardis <simon.dardis@imgtec.com> | 2016-08-18 13:22:43 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2016-08-18 13:22:43 +0000 |
| commit | 44b9d6a9c88ddef65bc6a6aec813a7940591f8b0 (patch) | |
| tree | 0e803197ee88c08c629e42a0c130c992e642d7e5 /test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll | |
| parent | c73cfcfe028469bd66d5e6fe03c81404d7c30824 (diff) | |
[mips] Correct tail call encoding for MIPSR6
r277708 enabled tails calls for MIPS but used the 'jr' instruction when the
jump target was held in a register. For MIPSR6, 'jalr $zero, $reg' should
have been used. Additionally, add missing patterns for external and global
symbols for tail calls.
Reviewers: dsanders, vkalintiris
Differential Review: https://reviews.llvm.org/D23301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279064 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll')
| -rw-r--r-- | test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll b/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll new file mode 100644 index 00000000000..73a6fc924ed --- /dev/null +++ b/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll @@ -0,0 +1,43 @@ +; RUN: llc -filetype=obj -march=mipsel -relocation-model=pic -verify-machineinstrs < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=PIC32 + +; RUN: llc -filetype=obj -march=mipsel -relocation-model=static -verify-machineinstrs < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC32 + +; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 -verify-machineinstrs < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=N64 + +; RUN: llc -filetype=obj -march=mipsel -relocation-model=pic -mattr=+micromips < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=PIC32MM + +; RUN: llc -filetype=obj -march=mipsel -relocation-model=static -mattr=+micromips < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC32MM + +; RUN: llc -filetype=obj -march=mipsel -relocation-model=pic -mcpu=mips32r6 < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=PIC32R6 +; RUN: llc -filetype=obj -march=mipsel -relocation-model=static -mcpu=mips32r6 < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC32R6 + +; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64r6 < %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=N64R6 + +declare i8 @f2(i8) + +define i8 @f1(i8 signext %i) nounwind { + %a = tail call i8 @f2(i8 %i) + ret i8 %a +} + +; PIC32: {{[0-9]}}: 08 00 20 03 jr $25 +; STATIC32: {{[0-9]}}: 00 00 00 08 j 0 + +; N64: {{[0-9a-z]+}}: 08 00 20 03 jr $25 + +; PIC32MM: {{[0-9a-z]+}}: b9 45 jrc $25 +; STATIC32MM: {{[0-9]}}: 00 d4 00 00 j 0 + +; PIC32R6: {{[0-9]}}: 00 00 19 d8 jrc $25 +; STATIC32R6: {{[0-9]}}: 00 00 00 08 j 0 + +; N64R6: {{[0-9a-z]+}}: 09 00 20 03 jr $25 + |