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| author | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2016-05-04 12:02:12 +0000 |
|---|---|---|
| committer | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2016-05-04 12:02:12 +0000 |
| commit | eacda36e7a221c584f7ac267f84b08a6f07ef3a3 (patch) | |
| tree | e7401136c3bf7c6f90bb2fca6c746e31a470b589 /test/CodeGen/Mips/rotate.ll | |
| parent | d33a1b7391229e666a426d7b0147390f4d49052b (diff) | |
[mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions
Differential Revision: http://reviews.llvm.org/D19857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268491 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/rotate.ll')
| -rw-r--r-- | test/CodeGen/Mips/rotate.ll | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/rotate.ll b/test/CodeGen/Mips/rotate.ll index 70eff6e224d..77936b7bef9 100644 --- a/test/CodeGen/Mips/rotate.ll +++ b/test/CodeGen/Mips/rotate.ll @@ -1,8 +1,15 @@ ; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s ; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s -check-prefix=mips16 +; RUN: llc -march=mips -mcpu=mips32r3 -mattr=+micromips < %s | FileCheck %s \ +; RUN: -check-prefix=MM32 +; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+micromips < %s | FileCheck %s \ +; RUN: -check-prefix=MM32 ; CHECK: rotrv $2, $4 ; mips16: .ent rot0 +; MM32: li16 $2, 32 +; MM32: subu16 $2, $2, $5 +; MM32: rotrv $2, $4, $2 define i32 @rot0(i32 %a, i32 %b) nounwind readnone { entry: %shl = shl i32 %a, %b @@ -14,6 +21,7 @@ entry: ; CHECK: rotr $2, $4, 22 ; mips16: .ent rot1 +; MM32: rotr $2, $4, 22 define i32 @rot1(i32 %a) nounwind readnone { entry: %shl = shl i32 %a, 10 @@ -24,6 +32,7 @@ entry: ; CHECK: rotrv $2, $4, $5 ; mips16: .ent rot2 +; MM32: rotrv $2, $4, $5 define i32 @rot2(i32 %a, i32 %b) nounwind readnone { entry: %shr = lshr i32 %a, %b @@ -35,6 +44,7 @@ entry: ; CHECK: rotr $2, $4, 10 ; mips16: .ent rot3 +; MM32: rotr $2, $4, 10 define i32 @rot3(i32 %a) nounwind readnone { entry: %shr = lshr i32 %a, 10 |