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authorJozef Kolek <jozef.kolek@imgtec.com>2015-02-19 11:51:32 +0000
committerJozef Kolek <jozef.kolek@imgtec.com>2015-02-19 11:51:32 +0000
commitbb539d3b4c7f5e933d0f585f9e766f21965c5881 (patch)
tree0d2a0751035f278ce53c1e7b0aab5782bcad3e40 /test/CodeGen/Mips/micromips-xor16.ll
parent71164d08b195c1d4d08dc8a0ac160671d2fe3596 (diff)
[mips][microMIPS] Make usage of AND16, OR16 and XOR16 by code generator
Differential Revision: http://reviews.llvm.org/D7611 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229845 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/micromips-xor16.ll')
-rw-r--r--test/CodeGen/Mips/micromips-xor16.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/micromips-xor16.ll b/test/CodeGen/Mips/micromips-xor16.ll
new file mode 100644
index 00000000000..991511275af
--- /dev/null
+++ b/test/CodeGen/Mips/micromips-xor16.ll
@@ -0,0 +1,18 @@
+; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
+; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
+
+define i32 @main() {
+entry:
+ %retval = alloca i32, align 4
+ %a = alloca i32, align 4
+ %b = alloca i32, align 4
+ %c = alloca i32, align 4
+ store i32 0, i32* %retval
+ %0 = load i32* %b, align 4
+ %1 = load i32* %c, align 4
+ %xor = xor i32 %0, %1
+ store i32 %xor, i32* %a, align 4
+ ret i32 0
+}
+
+; CHECK: xor16