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| author | Suyog Sarda <suyog.sarda@samsung.com> | 2014-12-17 10:34:27 +0000 |
|---|---|---|
| committer | Suyog Sarda <suyog.sarda@samsung.com> | 2014-12-17 10:34:27 +0000 |
| commit | 4bfc4f2e8ca185f850998e90fb11c76ff1a1c98e (patch) | |
| tree | 876611481b37a94e191e15c023afcde463ef891e /test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll | |
| parent | c0bd970d0e639d026705c11404efb984e4ea008d (diff) | |
Revert 224119 "This patch recognizes (+ (+ v0, v1) (+ v2, v3)), reorders them for bundling into vector of loads,
and vectorizes it."
This was re-ordering floating point data types resulting in mismatch in output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224424 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll')
0 files changed, 0 insertions, 0 deletions