diff options
| author | Simon Dardis <simon.dardis@imgtec.com> | 2017-01-26 10:19:02 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@imgtec.com> | 2017-01-26 10:19:02 +0000 |
| commit | 40f771f0731cf1bd1ad2189dcf30fc59dc684f12 (patch) | |
| tree | 81c107a3fe8cdf61976a36e5e7b5b26e01bcba04 /test/CodeGen/Mips/fcopysign-f32-f64.ll | |
| parent | 4cead7216bf9706a28269b1120746fd47e15a3b3 (diff) | |
[mips] N64 static relocation model support
This patch makes one change to GOT handling and two changes to N64's
relocation model handling. Furthermore, the jumptable encodings have
been corrected for static N64.
Big GOT handling is now done via a new SDNode MipsGotHi - this node is
unconditionally lowered to an lui instruction.
The first change to N64's relocation handling is the lifting of the
restriction that N64 always uses PIC. Now it is possible to target static
environments.
The second change adds support for 64 bit symbols and enables them by
default. Previously N64 had patterns for sym32 mode only. In this mode all
symbols are assumed to have 32 bit addresses. sym32 mode support
is selectable with attribute 'sym32'. A follow on patch for clang will
add the necessary frontend parameter.
This partially resolves PR/23485.
Thanks to Brooks Davis for reporting the issue!
Reviewers: dsanders, seanbruno, zoran.jovanovic, vkalintiris
Differential Revision: https://reviews.llvm.org/D23652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@293164 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/fcopysign-f32-f64.ll')
| -rw-r--r-- | test/CodeGen/Mips/fcopysign-f32-f64.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/Mips/fcopysign-f32-f64.ll b/test/CodeGen/Mips/fcopysign-f32-f64.ll index a3ea22feca2..e0229d14c52 100644 --- a/test/CodeGen/Mips/fcopysign-f32-f64.ll +++ b/test/CodeGen/Mips/fcopysign-f32-f64.ll @@ -36,12 +36,12 @@ define double @func3(double %d, float %f) nounwind readnone { entry: ; ALL-LABEL: func3: -; 64: dmfc1 $[[R0:[0-9]+]], ${{.*}} +; 64: mfc1 $[[MFC:[0-9]+]], $f13 ; 64: daddiu $[[R1:[0-9]+]], $zero, 1 +; 64: dmfc1 $[[R0:[0-9]+]], ${{.*}} ; 64: dsll $[[R2:[0-9]+]], $[[R1]], 63 ; 64: daddiu $[[R3:[0-9]+]], $[[R2]], -1 ; 64: and $[[AND0:[0-9]+]], $[[R0]], $[[R3]] -; 64: mfc1 $[[MFC:[0-9]+]], $f13 ; 64: srl $[[SRL:[0-9]+]], $[[MFC:[0-9]+]], 31 ; 64: dsll $[[DSLL:[0-9]+]], $[[SRL]], 63 ; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]] |