RegScavenging: Add scavengeRegisterBackwards()

Re-apply r276044/r279124/r305516. Fixed a problem where we would refuse
to place spills as the very first instruciton of a basic block and thus
artifically increase pressure (test in
test/CodeGen/PowerPC/scavenging.mir:spill_at_begin)

This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305625 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 58 insertions, 30 deletions

diff --git a/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll b/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
index a08b68149a7..625abc1a7e0 100644
--- a/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
+++ b/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
@@ -1,34 +1,62 @@
-; Check that register scavenging spill slot is close to $fp.
 ; RUN: llc -march=mipsel -O0 -relocation-model=pic < %s | FileCheck %s
+; Check that register scavenging spill slot is close to $fp.
+target triple="mipsel--"
 
-; CHECK: sw ${{.*}}, 8($sp)
-; CHECK: lw ${{.*}}, 8($sp)
+@var = external global i32
+@ptrvar = external global i8*
 
-define i32 @main(i32 signext %argc, i8** %argv) #0 {
-entry:
-  %retval = alloca i32, align 4
-  %argc.addr = alloca i32, align 4
-  %argv.addr = alloca i8**, align 4
-  %v0 = alloca <16 x i8>, align 16
-  %.compoundliteral = alloca <16 x i8>, align 16
-  %v1 = alloca <16 x i8>, align 16
-  %.compoundliteral1 = alloca <16 x i8>, align 16
-  %unused_variable = alloca [16384 x i32], align 4
-  %result = alloca <16 x i8>, align 16
-  store i32 0, i32* %retval
-  store i32 %argc, i32* %argc.addr, align 4
-  store i8** %argv, i8*** %argv.addr, align 4
-  store <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16>, <16 x i8>* %.compoundliteral
-  %0 = load <16 x i8>, <16 x i8>* %.compoundliteral
-  store <16 x i8> %0, <16 x i8>* %v0, align 16
-  store <16 x i8> zeroinitializer, <16 x i8>* %.compoundliteral1
-  %1 = load <16 x i8>, <16 x i8>* %.compoundliteral1
-  store <16 x i8> %1, <16 x i8>* %v1, align 16
-  %2 = load <16 x i8>, <16 x i8>* %v0, align 16
-  %3 = load <16 x i8>, <16 x i8>* %v1, align 16
-  %mul = mul <16 x i8> %2, %3
-  store <16 x i8> %mul, <16 x i8>* %result, align 16
-  ret i32 0
-}
+; CHECK-LABEL: func:
+define void @func() {
+  %space = alloca i32, align 4
+  %stackspace = alloca[16384 x i32], align 4
+
+  ; ensure stackspace is not optimized out
+  %stackspace_casted = bitcast [16384 x i32]* %stackspace to i8*
+  store volatile i8* %stackspace_casted, i8** @ptrvar
 
-attributes #0 = { noinline "no-frame-pointer-elim"="true" }
+  ; Load values to increase register pressure.
+  %v0 = load volatile i32, i32* @var
+  %v1 = load volatile i32, i32* @var
+  %v2 = load volatile i32, i32* @var
+  %v3 = load volatile i32, i32* @var
+  %v4 = load volatile i32, i32* @var
+  %v5 = load volatile i32, i32* @var
+  %v6 = load volatile i32, i32* @var
+  %v7 = load volatile i32, i32* @var
+  %v8 = load volatile i32, i32* @var
+  %v9 = load volatile i32, i32* @var
+  %v10 = load volatile i32, i32* @var
+  %v11 = load volatile i32, i32* @var
+  %v12 = load volatile i32, i32* @var
+  %v13 = load volatile i32, i32* @var
+  %v14 = load volatile i32, i32* @var
+  %v15 = load volatile i32, i32* @var
+  %v16 = load volatile i32, i32* @var
+
+  ; Computing a stack-relative values needs an additional register.
+  ; We should get an emergency spill/reload for this.
+  ; CHECK: sw ${{.*}}, 0($sp)
+  ; CHECK: lw ${{.*}}, 0($sp)
+  store volatile i32 %v0, i32* %space
+
+  ; store values so they are used.
+  store volatile i32 %v0, i32* @var
+  store volatile i32 %v1, i32* @var
+  store volatile i32 %v2, i32* @var
+  store volatile i32 %v3, i32* @var
+  store volatile i32 %v4, i32* @var
+  store volatile i32 %v5, i32* @var
+  store volatile i32 %v6, i32* @var
+  store volatile i32 %v7, i32* @var
+  store volatile i32 %v8, i32* @var
+  store volatile i32 %v9, i32* @var
+  store volatile i32 %v10, i32* @var
+  store volatile i32 %v11, i32* @var
+  store volatile i32 %v12, i32* @var
+  store volatile i32 %v13, i32* @var
+  store volatile i32 %v14, i32* @var
+  store volatile i32 %v15, i32* @var
+  store volatile i32 %v16, i32* @var
+
+  ret void
+}