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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2015-05-12 17:14:05 +0000 |
|---|---|---|
| committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2015-05-12 17:14:05 +0000 |
| commit | 2c3514ae0dbd6389939f9861b2f30382c8164711 (patch) | |
| tree | f59b9daa6a20ec11414b25891a756bf0c4e93011 /test/CodeGen/Mips/emergency-spill-slot-near-fp.ll | |
| parent | e83e5d460db99fa9ac907d08154ce681b1b08d5b (diff) | |
[Mips] Return false for isFPCloseToIncomingSP()
On Mips, frame pointer points to the same side of the frame as the stack
pointer. This function is used to decide where to put register scavenging
spill slot. So far, it was put on the wrong side of the frame, and thus it
was too far away from $fp when frame was larger than 2^15 bytes.
Patch by Vladimir Radosavljevic.
http://reviews.llvm.org/D8895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237153 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/emergency-spill-slot-near-fp.ll')
| -rw-r--r-- | test/CodeGen/Mips/emergency-spill-slot-near-fp.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll b/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll new file mode 100644 index 00000000000..3dc1cde7709 --- /dev/null +++ b/test/CodeGen/Mips/emergency-spill-slot-near-fp.ll @@ -0,0 +1,32 @@ +; Check that register scavenging spill slot is close to $fp. +; RUN: llc -march=mipsel -O0 < %s | FileCheck %s + +; CHECK: sw ${{.*}}, 4($fp) +; CHECK: lw ${{.*}}, 4($fp) + +define i32 @main(i32 signext %argc, i8** %argv) "no-frame-pointer-elim"="true" { +entry: + %retval = alloca i32, align 4 + %argc.addr = alloca i32, align 4 + %argv.addr = alloca i8**, align 4 + %v0 = alloca <16 x i8>, align 16 + %.compoundliteral = alloca <16 x i8>, align 16 + %v1 = alloca <16 x i8>, align 16 + %.compoundliteral1 = alloca <16 x i8>, align 16 + %unused_variable = alloca [16384 x i32], align 4 + %result = alloca <16 x i8>, align 16 + store i32 0, i32* %retval + store i32 %argc, i32* %argc.addr, align 4 + store i8** %argv, i8*** %argv.addr, align 4 + store <16 x i8> <i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16>, <16 x i8>* %.compoundliteral + %0 = load <16 x i8>, <16 x i8>* %.compoundliteral + store <16 x i8> %0, <16 x i8>* %v0, align 16 + store <16 x i8> zeroinitializer, <16 x i8>* %.compoundliteral1 + %1 = load <16 x i8>, <16 x i8>* %.compoundliteral1 + store <16 x i8> %1, <16 x i8>* %v1, align 16 + %2 = load <16 x i8>, <16 x i8>* %v0, align 16 + %3 = load <16 x i8>, <16 x i8>* %v1, align 16 + %mul = mul <16 x i8> %2, %3 + store <16 x i8> %mul, <16 x i8>* %result, align 16 + ret i32 0 +} |