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authorAkira Hatanaka <ahatanak@gmail.com>2011-04-15 19:52:08 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-04-15 19:52:08 +0000
commit99a2e98eddf00c4afd3817564cb8c914a6f66ae9 (patch)
treee8a278000fc29086534d63dc2e15a3af6217841f /test/CodeGen/Mips/buildpairextractelementf64.ll
parentb6a638898a92d5cd782209fbeb673fe7846a29eb (diff)
Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129594 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/buildpairextractelementf64.ll')
-rw-r--r--test/CodeGen/Mips/buildpairextractelementf64.ll27
1 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/buildpairextractelementf64.ll b/test/CodeGen/Mips/buildpairextractelementf64.ll
new file mode 100644
index 00000000000..23eb63c2f27
--- /dev/null
+++ b/test/CodeGen/Mips/buildpairextractelementf64.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-EL
+; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=CHECK-EB
+@a = external global i32
+
+define double @f(i32 %a1, double %d) nounwind {
+entry:
+; CHECK-EL: mtc1 $6, $f12
+; CHECK-EL: mtc1 $7, $f13
+; CHECK-EB: mtc1 $7, $f12
+; CHECK-EB: mtc1 $6, $f13
+ store i32 %a1, i32* @a, align 4
+ %add = fadd double %d, 2.000000e+00
+ ret double %add
+}
+
+define void @f3(double %d, i32 %a1) nounwind {
+entry:
+; CHECK-EL: mfc1 ${{[0-9]+}}, $f12
+; CHECK-EL: mfc1 $7, $f13
+; CHECK-EB: mfc1 ${{[0-9]+}}, $f13
+; CHECK-EB: mfc1 $7, $f12
+ tail call void @f2(i32 %a1, double %d) nounwind
+ ret void
+}
+
+declare void @f2(i32, double)
+