summaryrefslogtreecommitdiff
path: root/test/CodeGen/Mips/2008-07-15-SmallSection.ll
diff options
context:
space:
mode:
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2008-08-08 04:05:51 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2008-08-08 04:05:51 +0000
commitba3442fc2433e200ca9620e143d3ed52c7e8ba12 (patch)
tree7fc2ad484fd0701d2b685d691a305ec5ab5dfcea /test/CodeGen/Mips/2008-07-15-SmallSection.ll
parente5813b7aa8f7379ee2e783f0ef4df73e2d9474c6 (diff)
Batch 3 of Mips CodeGen tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54508 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Mips/2008-07-15-SmallSection.ll')
-rw-r--r--test/CodeGen/Mips/2008-07-15-SmallSection.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/2008-07-15-SmallSection.ll b/test/CodeGen/Mips/2008-07-15-SmallSection.ll
new file mode 100644
index 00000000000..0e3f8647953
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-15-SmallSection.ll
@@ -0,0 +1,32 @@
+; RUN: llvm-as < %s | llc -mips-ssection-threshold=8 -march=mips -f -o %t0
+; RUN: llvm-as < %s | llc -mips-ssection-threshold=0 -march=mips -f -o %t1
+; RUN: grep {sdata} %t0 | count 1
+; RUN: grep {sbss} %t0 | count 1
+; RUN: grep {gp_rel} %t0 | count 2
+; RUN: not grep {sdata} %t1
+; RUN: not grep {sbss} %t1
+; RUN: not grep {gp_rel} %t1
+; RUN: grep {\%hi} %t1 | count 2
+; RUN: grep {\%lo} %t1 | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+ %struct.anon = type { i32, i32 }
+@s0 = global [8 x i8] c"AAAAAAA\00", align 4
+@foo = global %struct.anon { i32 2, i32 3 }
+@bar = global %struct.anon zeroinitializer
+
+define i8* @A0() nounwind {
+entry:
+ ret i8* getelementptr ([8 x i8]* @s0, i32 0, i32 0)
+}
+
+define i32 @A1() nounwind {
+entry:
+ load i32* getelementptr (%struct.anon* @foo, i32 0, i32 0), align 8
+ load i32* getelementptr (%struct.anon* @foo, i32 0, i32 1), align 4
+ add i32 %1, %0
+ ret i32 %2
+}
+