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| author | Nirav Dave <niravd@google.com> | 2017-05-16 19:43:56 +0000 |
|---|---|---|
| committer | Nirav Dave <niravd@google.com> | 2017-05-16 19:43:56 +0000 |
| commit | acc2c1d71dada4b03aab20bebb325af3e7fb65cd (patch) | |
| tree | 8546e2dbbb2d12a23c0db52d1554e6e98d490324 /test/CodeGen/MSP430 | |
| parent | 34eb467434a593e5a5218b9892b8692845e69069 (diff) | |
Elide stores which are overwritten without being observed.
Summary:
In SelectionDAG, when a store is immediately chained to another store
to the same address, elide the first store as it has no observable
effects. This is causes small improvements dealing with intrinsics
lowered to stores.
Test notes:
* Many testcases overwrite store addresses multiple times and needed
minor changes, mainly making stores volatile to prevent the
optimization from optimizing the test away.
* Many X86 test cases optimized out instructions associated with
associated with va_start.
* Note that test_splat in CodeGen/AArch64/misched-stp.ll no longer has
dependencies to check and can probably be removed and potentially
replaced with another test.
Reviewers: rnk, john.brawn
Subscribers: aemerson, rengolin, qcolombet, jyknight, nemanjai, nhaehnle, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D33206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303198 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/MSP430')
| -rw-r--r-- | test/CodeGen/MSP430/vararg.ll | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/test/CodeGen/MSP430/vararg.ll b/test/CodeGen/MSP430/vararg.ll index 6c8bceff5de..a708b89cbd8 100644 --- a/test/CodeGen/MSP430/vararg.ll +++ b/test/CodeGen/MSP430/vararg.ll @@ -25,7 +25,6 @@ define i16 @va_arg(i8* %vl) nounwind { entry: ; CHECK-LABEL: va_arg: %vl.addr = alloca i8*, align 2 -; CHECK: mov.w r12, 0(r1) store i8* %vl, i8** %vl.addr, align 2 ; CHECK: mov.w r12, [[REG:r[0-9]+]] ; CHECK-NEXT: add.w #2, [[REG]] |