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authorJob Noorman <jobnoorman@gmail.com>2014-09-10 06:58:14 +0000
committerJob Noorman <jobnoorman@gmail.com>2014-09-10 06:58:14 +0000
commit77f923cfc167b790cec8f2f13c51d543a53f08af (patch)
tree2f1e216f0c99056dbe4d3fd248616e9d06f90e20 /test/CodeGen/MSP430
parent7d822f839f221ae2288e04ff96c17a4f4704db05 (diff)
Drop the W postfix on the 16-bit registers.
This ensures the inline assembly register constraints are properly recognised in TargetLowering::getRegForInlineAsmConstraint. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217479 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/MSP430')
-rw-r--r--test/CodeGen/MSP430/asm-clobbers.ll13
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/MSP430/asm-clobbers.ll b/test/CodeGen/MSP430/asm-clobbers.ll
new file mode 100644
index 00000000000..216a3fe4018
--- /dev/null
+++ b/test/CodeGen/MSP430/asm-clobbers.ll
@@ -0,0 +1,13 @@
+; RUN: llc < %s | FileCheck %s
+
+target datalayout = "e-m:e-p:16:16-i32:16:32-a:16-n8:16"
+target triple = "msp430---elf"
+
+define void @test() {
+entry:
+; CHECK-LABEL: test:
+; CHECK: push.w r10
+ call void asm sideeffect "", "~{r10}"()
+; CHECK: pop.w r10
+ ret void
+}