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| author | Oren Ben Simhon <oren.ben.simhon@intel.com> | 2017-03-19 13:23:20 +0000 |
|---|---|---|
| committer | Oren Ben Simhon <oren.ben.simhon@intel.com> | 2017-03-19 13:23:20 +0000 |
| commit | c1d183262c95a5dcc6e1be2ded946fbcb3bd091c (patch) | |
| tree | 30cfd5902ab7c04630df8580e6742d8b27d14fef /test/CodeGen/MIR | |
| parent | 4cd123aadaf70194f56abd420c4ca9b4ce2ca1d8 (diff) | |
[MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/MIR')
| -rw-r--r-- | test/CodeGen/MIR/X86/dynamic-regmask.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/MIR/X86/dynamic-regmask.ll b/test/CodeGen/MIR/X86/dynamic-regmask.ll index 261f94747af..df58f4be79d 100644 --- a/test/CodeGen/MIR/X86/dynamic-regmask.ll +++ b/test/CodeGen/MIR/X86/dynamic-regmask.ll @@ -1,6 +1,6 @@ -; RUN: llc -mtriple x86_64-windows-msvc -stop-after machine-sink %s -o %t.mir
+; RUN: llc -mtriple=x86_64-pc-win32 -stop-after machine-sink %s -o %t.mir
; RUN: FileCheck %s < %t.mir
-; RUN: llc %t.mir -run-pass machine-sink
+; RUN: llc %t.mir -mtriple=x86_64-pc-win32 -run-pass machine-sink
; Check that callee saved registers are printed in a format that can then be parsed.
declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0)
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