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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-21 19:27:36 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-21 19:27:36 +0000 |
| commit | d47c3f5b20b4206c374c64cd4275ab4a8b0abb94 (patch) | |
| tree | fc7c5f7f0fc441018ce859c3bb9e24de9d6b27aa /test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir | |
| parent | f2616d2fd39a159c6e807de6cbd93728ef4eb9be (diff) | |
AMDGPU: Remove dead declarations from MIR tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295755 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir')
| -rw-r--r-- | test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir b/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir index d73503223aa..fec7a5d7a38 100644 --- a/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir +++ b/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=amdgcn -mcpu=SI -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s --- | @@ -14,21 +14,7 @@ ret void } - declare { i1, i64 } @llvm.SI.if(i1) - - declare { i1, i64 } @llvm.SI.else(i64) - - declare i64 @llvm.SI.break(i64) - - declare i64 @llvm.SI.if.break(i1, i64) - - declare i64 @llvm.SI.else.break(i64, i64) - - declare i1 @llvm.SI.loop(i64) - - declare void @llvm.SI.end.cf(i64) - - attributes #0 = { "target-cpu"="SI" } + attributes #0 = { nounwind } ... --- |