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author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-02-22 21:23:09 +0000 |
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committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-02-22 21:23:09 +0000 |
commit | 7af390a6819f366b48912a00a200d7db1d1eb61a (patch) | |
tree | 4d46afc9c6bc4ecc5c893aeaea2056fa03f3ba8a /test/CodeGen/Hexagon/intrinsics/byte-store-double.ll | |
parent | c1d17d5f71eadfbb96386ea622292b49ecbbc735 (diff) |
[Hexagon] Add intrinsics for masked vector stores
Patch by Harsha Jagasia.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295879 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon/intrinsics/byte-store-double.ll')
-rw-r--r-- | test/CodeGen/Hexagon/intrinsics/byte-store-double.ll | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/intrinsics/byte-store-double.ll b/test/CodeGen/Hexagon/intrinsics/byte-store-double.ll new file mode 100644 index 00000000000..2a54bfef0ad --- /dev/null +++ b/test/CodeGen/Hexagon/intrinsics/byte-store-double.ll @@ -0,0 +1,41 @@ +; RUN: llc -mattr=+hvx-double -march=hexagon -O2 < %s | FileCheck %s + +; CHECK-LABEL: V6_vmaskedstoreq_128B +; CHECK: if (q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0) = v{{[0-9]+}} + +; CHECK-LABEL: V6_vmaskedstorenq_128B +; CHECK: if (!q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0) = v{{[0-9]+}} + +; CHECK-LABEL: V6_vmaskedstorentq_128B +; CHECK: if (q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0):nt = v{{[0-9]+}} + +; CHECK-LABEL: V6_vmaskedstorentnq_128B +; CHECK: if (!q{{[0-3]+}}) vmem(r{{[0-9]+}}+#0):nt = v{{[0-9]+}} + +declare void @llvm.hexagon.V6.vmaskedstoreq.128B(<1024 x i1>, i8*, <32 x i32>) +define void @V6_vmaskedstoreq_128B( <32 x i32> %a, i8* %b, <32 x i32> %c) { + %1 = bitcast <32 x i32> %a to <1024 x i1> + call void @llvm.hexagon.V6.vmaskedstoreq.128B(<1024 x i1> %1, i8* %b, <32 x i32> %c) + ret void +} + +declare void @llvm.hexagon.V6.vmaskedstorenq.128B(<1024 x i1>, i8*, <32 x i32>) +define void @V6_vmaskedstorenq_128B( <32 x i32> %a, i8* %b, <32 x i32> %c) { + %1 = bitcast <32 x i32> %a to <1024 x i1> + call void @llvm.hexagon.V6.vmaskedstorenq.128B(<1024 x i1> %1, i8* %b, <32 x i32> %c) + ret void +} + +declare void @llvm.hexagon.V6.vmaskedstorentq.128B(<1024 x i1>, i8*, <32 x i32>) +define void @V6_vmaskedstorentq_128B( <32 x i32> %a, i8* %b, <32 x i32> %c) { + %1 = bitcast <32 x i32> %a to <1024 x i1> + call void @llvm.hexagon.V6.vmaskedstorentq.128B(<1024 x i1> %1, i8* %b, <32 x i32> %c) + ret void +} + +declare void @llvm.hexagon.V6.vmaskedstorentnq.128B(<1024 x i1>, i8*, <32 x i32>) +define void @V6_vmaskedstorentnq_128B( <32 x i32> %a, i8* %b, <32 x i32> %c) { + %1 = bitcast <32 x i32> %a to <1024 x i1> + call void @llvm.hexagon.V6.vmaskedstorentnq.128B(<1024 x i1> %1, i8* %b, <32 x i32> %c) + ret void +} |