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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
| tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/Hexagon/block-addr.ll | |
| parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/Hexagon/block-addr.ll')
| -rw-r--r-- | test/CodeGen/Hexagon/block-addr.ll | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/Hexagon/block-addr.ll b/test/CodeGen/Hexagon/block-addr.ll index dc0d6e60fd2..902765e42ef 100644 --- a/test/CodeGen/Hexagon/block-addr.ll +++ b/test/CodeGen/Hexagon/block-addr.ll @@ -10,7 +10,7 @@ entry: br label %while.body while.body: - %ret.0.load17 = load volatile i32* %ret, align 4 + %ret.0.load17 = load volatile i32, i32* %ret, align 4 switch i32 %ret.0.load17, label %label6 [ i32 0, label %label0 i32 1, label %label1 @@ -21,37 +21,37 @@ while.body: ] label0: - %ret.0.load18 = load volatile i32* %ret, align 4 + %ret.0.load18 = load volatile i32, i32* %ret, align 4 %inc = add nsw i32 %ret.0.load18, 1 store volatile i32 %inc, i32* %ret, align 4 br label %while.body label1: - %ret.0.load19 = load volatile i32* %ret, align 4 + %ret.0.load19 = load volatile i32, i32* %ret, align 4 %inc2 = add nsw i32 %ret.0.load19, 1 store volatile i32 %inc2, i32* %ret, align 4 br label %while.body label2: - %ret.0.load20 = load volatile i32* %ret, align 4 + %ret.0.load20 = load volatile i32, i32* %ret, align 4 %inc4 = add nsw i32 %ret.0.load20, 1 store volatile i32 %inc4, i32* %ret, align 4 br label %while.body label3: - %ret.0.load21 = load volatile i32* %ret, align 4 + %ret.0.load21 = load volatile i32, i32* %ret, align 4 %inc6 = add nsw i32 %ret.0.load21, 1 store volatile i32 %inc6, i32* %ret, align 4 br label %while.body label4: - %ret.0.load22 = load volatile i32* %ret, align 4 + %ret.0.load22 = load volatile i32, i32* %ret, align 4 %inc8 = add nsw i32 %ret.0.load22, 1 store volatile i32 %inc8, i32* %ret, align 4 br label %while.body label5: - %ret.0.load23 = load volatile i32* %ret, align 4 + %ret.0.load23 = load volatile i32, i32* %ret, align 4 %inc10 = add nsw i32 %ret.0.load23, 1 store volatile i32 %inc10, i32* %ret, align 4 br label %while.body |