diff options
author | Quentin Colombet <qcolombet@apple.com> | 2015-11-30 20:37:58 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2015-11-30 20:37:58 +0000 |
commit | ddaf09c1921d4306b865fae11bf9cfdca6b62731 (patch) | |
tree | f9aa8f12a5f58f4891a09f8b8d95100a01a1e2d5 /test/CodeGen/ARM/thumb1_return_sequence.ll | |
parent | 3be8e6a768d24304a43bc915d974c7551ec86248 (diff) |
[ARM] For old thumb ISA like v4t, we cannot use PC directly in pop.
Fix the epilogue emission to account for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254325 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/thumb1_return_sequence.ll')
-rw-r--r-- | test/CodeGen/ARM/thumb1_return_sequence.ll | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/thumb1_return_sequence.ll b/test/CodeGen/ARM/thumb1_return_sequence.ll index 5b9c19ab5eb..67d1cad2cf6 100644 --- a/test/CodeGen/ARM/thumb1_return_sequence.ll +++ b/test/CodeGen/ARM/thumb1_return_sequence.ll @@ -23,9 +23,22 @@ entry: ; -------- ; CHECK-V4T: add sp, ; CHECK-V4T-NEXT: pop {[[SAVED]]} -; We do not have any SP update to insert so we can just optimize -; the pop sequence. -; CHECK-V4T-NEXT: pop {pc} +; The ISA for v4 does not support pop pc, so make sure we do not emit +; one even when we do not need to update SP. +; CHECK-V4T-NOT: pop {pc} +; We may only use lo register to pop, but in that case, all the scratch +; ones are used. +; r12 is the only register we are allowed to clobber for AAPCS. +; Use it to save a lo register. +; CHECK-V4T-NEXT: mov [[TEMP_REG:r12]], [[POP_REG:r[0-7]]] +; Pop the value of LR. +; CHECK-V4T-NEXT: pop {[[POP_REG]]} +; Copy the value of LR in the right register. +; CHECK-V4T-NEXT: mov lr, [[POP_REG]] +; Restore the value that was in the register we used to pop the value of LR. +; CHECK-V4T-NEXT: mov [[POP_REG]], [[TEMP_REG]] +; Return. +; CHECK-V4T-NEXT: bx lr ; CHECK-V5T: pop {[[SAVED]], pc} } @@ -93,7 +106,13 @@ entry: ; Epilogue ; -------- ; CHECK-V4T: pop {[[SAVED]]} -; CHECK-V4T: pop {pc} +; The ISA for v4 does not support pop pc, so make sure we do not emit +; one even when we do not need to update SP. +; CHECK-V4T-NOT: pop {pc} +; Pop the value of LR into a scratch lo register other than r0 (it is +; used for the return value). +; CHECK-V4T-NEXT: pop {[[POP_REG:r[1-3]]]} +; CHECK-V4T-NEXT: bx [[POP_REG]] ; CHECK-V5T: pop {[[SAVED]], pc} } |