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| author | Evan Cheng <evan.cheng@apple.com> | 2012-02-23 02:58:19 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2012-02-23 02:58:19 +0000 |
| commit | 5fb468a6b308b643edf61f1731b6d95fd1a03bf4 (patch) | |
| tree | 8603bb3d08cf746c8d45bc935268c9e0895afb86 /test/CodeGen/ARM/rev.ll | |
| parent | 81a682a4c004b0f44452ef824637a1b6face178f (diff) | |
Canonicalize (srl (bswap x), 16) to (rotr (bswap x), 16) if the high 16 bits
of x are zero. This optimizes rev + lsr 16 to rev16.
rdar://10750814
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151230 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/rev.ll')
| -rw-r--r-- | test/CodeGen/ARM/rev.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/rev.ll b/test/CodeGen/ARM/rev.ll index ea44c28fb70..6bb67431198 100644 --- a/test/CodeGen/ARM/rev.ll +++ b/test/CodeGen/ARM/rev.ll @@ -112,11 +112,11 @@ entry: ret i32 %conv3 } +; rdar://10750814 define zeroext i16 @test9(i16 zeroext %v) nounwind readnone { entry: ; CHECK: test9 -; CHECK: rev r0, r0 -; CHECK: lsr r0, r0, #16 +; CHECK: rev16 r0, r0 %conv = zext i16 %v to i32 %shr4 = lshr i32 %conv, 8 %shl = shl nuw nsw i32 %conv, 8 |