diff options
author | Nirav Dave <niravd@google.com> | 2017-04-06 19:05:41 +0000 |
---|---|---|
committer | Nirav Dave <niravd@google.com> | 2017-04-06 19:05:41 +0000 |
commit | d4d2ab353e046fe47a185042bad7f1e80c8a3d2f (patch) | |
tree | 63f8d25133b8e428e47653d6c5a94f8b9594a2a4 /test/CodeGen/ARM/pr32545.ll | |
parent | f8e400cffa8bed8dfc01aba1e9e1ad3505ee5d4e (diff) |
[SDAG] Fix visitAND optimization to deal with vector extract case again.
Summary:
Fix case elided by rL298920.
Fixes PR32545.
Reviewers: eli.friedman, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D31759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299688 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/pr32545.ll')
-rw-r--r-- | test/CodeGen/ARM/pr32545.ll | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/pr32545.ll b/test/CodeGen/ARM/pr32545.ll new file mode 100644 index 00000000000..5bfb01b4598 --- /dev/null +++ b/test/CodeGen/ARM/pr32545.ll @@ -0,0 +1,22 @@ +; RUN: llc %s -o - | FileCheck %s + +target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" +target triple = "armv7--linux-gnueabi" + +; CHECK: vld1.16 {[[DREG:d[0-9]+]][0]}, {{.*}} +; CHECK: vmovl.u8 [[QREG:q[0-9]+]], [[DREG]] +; CHECK: vmovl.u16 [[QREG]], [[DREG]] + +define void @f(i32 %dstStride, i8* %indvars.iv, <2 x i8>* %zz) { +entry: + br label %for.body + +for.body: + %tmp = load <2 x i8>, <2 x i8>* %zz, align 1 + %tmp1 = extractelement <2 x i8> %tmp, i32 0 + %.lhs.rhs = zext i8 %tmp1 to i32 + call void @g(i32 %.lhs.rhs) + br label %for.body +} + +declare void @g(i32) |