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| author | Eric Christopher <echristo@apple.com> | 2011-07-01 00:30:46 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2011-07-01 00:30:46 +0000 |
| commit | d5dc9eca2beece0faa85e7cbf17182fe7fcd0b36 (patch) | |
| tree | 04c8869b13a6ac816cdd353017ce17645919a260 /test/CodeGen/ARM/inlineasm3.ll | |
| parent | e1bff38386b0af24b5564c3d20888c7bbb045099 (diff) | |
Add support for the ARM 't' register constraint. And another testcase
for the 'x' register constraint.
Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134220 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/inlineasm3.ll')
| -rw-r--r-- | test/CodeGen/ARM/inlineasm3.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll index f09deb39f8c..00257e1cdb3 100644 --- a/test/CodeGen/ARM/inlineasm3.ll +++ b/test/CodeGen/ARM/inlineasm3.ll @@ -68,3 +68,23 @@ entry: %0 = tail call float asm "flds s15, $0", "=x"() nounwind ret float %0 } + +; Radar 9307836 & 9119939 + +define double @t7(double %y) nounwind ssp { +entry: +; CHECK: t7 +; CHECK: flds s15, d0 + %0 = tail call double asm "flds s15, $0", "=x"() nounwind + ret double %0 +} + +; Radar 9307836 & 9119939 + +define float @t8(float %y) nounwind ssp { +entry: +; CHECK: t8 +; CHECK: flds s15, s0 + %0 = tail call float asm "flds s15, $0", "=t"() nounwind + ret float %0 +} |