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authorBob Wilson <bob.wilson@apple.com>2011-12-12 21:45:15 +0000
committerBob Wilson <bob.wilson@apple.com>2011-12-12 21:45:15 +0000
commit9cd2b9562d23909937ab2e4bb45c2a1ed4c86816 (patch)
tree8d72ee2dcfc13a61e4e43f51bbe72433c168c005 /test/CodeGen/ARM/inlineasm3.ll
parentb4b54153ad760c69a00a08531abef4ed434a5092 (diff)
Implement 'e' and 'f' modifiers for Neon inline asm. <rdar://problem/10551006>
These modifiers simply select either the low or high D subregister of a Neon Q register. I've also removed the unimplemented 'p' modifier, which turns out to be a bit different than the comment here suggests and as far as I can tell was only intended for internal use in Apple's version of gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146417 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/inlineasm3.ll')
-rw-r--r--test/CodeGen/ARM/inlineasm3.ll10
1 files changed, 10 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll
index cb5243c9062..2fcc45f4af9 100644
--- a/test/CodeGen/ARM/inlineasm3.ll
+++ b/test/CodeGen/ARM/inlineasm3.ll
@@ -110,3 +110,13 @@ entry:
call void asm "str $1, $0", "=*Q,r"(i8** %f.addr, i32 %g) nounwind
ret void
}
+
+; Radar 10551006
+
+define <4 x i32> @t11(i32* %p) nounwind {
+entry:
+; CHECK: t11
+; CHECK: vld1.s32 {d16[], d17[]}, [r0]
+ %0 = tail call <4 x i32> asm "vld1.s32 {${0:e}[], ${0:f}[]}, [$1]", "=w,r"(i32* %p) nounwind
+ ret <4 x i32> %0
+}