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| author | Renato Golin <renato.golin@linaro.org> | 2014-10-23 15:31:50 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2014-10-23 15:31:50 +0000 |
| commit | 06b11e36e5d0981a4da994baa78a54dbe8a9878e (patch) | |
| tree | a3311e5de42a6955aab734d278ec18263d23a6d6 /test/CodeGen/ARM/fpcmp-f64-neon-opt.ll | |
| parent | 8b8e2b2f81634900a40eaa9336b8617f88b4f97e (diff) | |
Do not emit intermediate register for zero FP immediate
This updates check for double precision zero floating point constant to allow
use of instruction with immediate value rather than temporary register.
Currently "a == 0.0", where "a" is of "double" type generates:
vmov.i32 d16, #0x0
vcmpe.f64 d0, d16
With this change it becomes:
vcmpe.f64 d0, #0
Patch by Sergey Dmitrouk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220486 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fpcmp-f64-neon-opt.ll')
| -rw-r--r-- | test/CodeGen/ARM/fpcmp-f64-neon-opt.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll b/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll new file mode 100644 index 00000000000..7444a6851d9 --- /dev/null +++ b/test/CodeGen/ARM/fpcmp-f64-neon-opt.ll @@ -0,0 +1,12 @@ +; RUN: llc -mtriple=linux-arm-gnueabihf -mattr=+neon %s -o - | FileCheck %s + +; Check that no intermediate integer register is used. +define i32 @no-intermediate-register-for-zero-imm(double %x) #0 { +entry: +; CHECK-LABEL: no-intermediate-register-for-zero-imm +; CHECK-NOT: vmov +; CHECK: vcmp + %cmp = fcmp une double %x, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} |