diff options
| author | Nirav Dave <niravd@google.com> | 2017-12-06 15:30:13 +0000 |
|---|---|---|
| committer | Nirav Dave <niravd@google.com> | 2017-12-06 15:30:13 +0000 |
| commit | 256a26609b9e6977a0a24d5b8cc0cdfc386eb677 (patch) | |
| tree | 80acffc678f5915ea4e00bafd1e8c0ba518dcd3c /test/CodeGen/ARM/fp16-promote.ll | |
| parent | e780c515773ad78af5d0a3f30a56440347911941 (diff) | |
[ARM][AArch64][DAG] Reenable post-legalize store merge
Reenable post-legalize stores with constant merging computation and
corresponding test case.
* Properly truncate store merge constants
* Disable merging of truncated stores floating points
* Ensure merges of constant stores into a single vector are
constructed from legal elements.
Reviewers: eastig, efriedma
Reviewed By: eastig
Subscribers: spatel, rengolin, aemerson, javed.absar, kristof.beyls, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D40701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319899 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/fp16-promote.ll')
| -rw-r--r-- | test/CodeGen/ARM/fp16-promote.ll | 50 |
1 files changed, 31 insertions, 19 deletions
diff --git a/test/CodeGen/ARM/fp16-promote.ll b/test/CodeGen/ARM/fp16-promote.ll index 257d99d1192..da2a1df9522 100644 --- a/test/CodeGen/ARM/fp16-promote.ll +++ b/test/CodeGen/ARM/fp16-promote.ll @@ -817,25 +817,37 @@ define void @test_fmuladd(half* %p, half* %q, half* %r) #0 { ; CHECK-ALL-LABEL: test_insertelement: ; CHECK-ALL: sub sp, sp, #8 -; CHECK-ALL: ldrh -; CHECK-ALL: ldrh -; CHECK-ALL: ldrh -; CHECK-ALL: ldrh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: mov -; CHECK-ALL-DAG: ldrh -; CHECK-ALL-DAG: orr -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: ldrh -; CHECK-ALL-DAG: ldrh -; CHECK-ALL-DAG: ldrh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: strh -; CHECK-ALL-DAG: strh + +; CHECK-VFP: and +; CHECK-VFP: mov +; CHECK-VFP: ldrd +; CHECK-VFP: orr +; CHECK-VFP: ldrh +; CHECK-VFP: stm +; CHECK-VFP: strh +; CHECK-VFP: ldm +; CHECK-VFP: stm + +; CHECK-NOVFP: ldrh +; CHECK-NOVFP: ldrh +; CHECK-NOVFP: ldrh +; CHECK-NOVFP: ldrh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: mov +; CHECK-NOVFP-DAG: ldrh +; CHECK-NOVFP-DAG: orr +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: ldrh +; CHECK-NOVFP-DAG: ldrh +; CHECK-NOVFP-DAG: ldrh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: strh +; CHECK-NOVFP-DAG: strh + ; CHECK-ALL: add sp, sp, #8 define void @test_insertelement(half* %p, <4 x half>* %q, i32 %i) #0 { %a = load half, half* %p, align 2 |