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authorAdrian Prantl <aprantl@apple.com>2014-02-27 17:56:08 +0000
committerAdrian Prantl <aprantl@apple.com>2014-02-27 17:56:08 +0000
commit4bd26ae070d3ee565c5b0297657003ee4767a5ab (patch)
tree163d772d8dde9c11e9b1f80ed6a0646827973b4a /test/CodeGen/ARM/debug-info-s16-reg.ll
parentcc331c8f40107934b4bfa36d3646126bc0c4a412 (diff)
Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now
scan the register file for sub- and super-registers. No functionality change intended. (Tests are updated because the comments in the assembler output are different.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202416 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/debug-info-s16-reg.ll')
-rw-r--r--test/CodeGen/ARM/debug-info-s16-reg.ll6
1 files changed, 4 insertions, 2 deletions
diff --git a/test/CodeGen/ARM/debug-info-s16-reg.ll b/test/CodeGen/ARM/debug-info-s16-reg.ll
index e92d9776db8..ee9faf833cc 100644
--- a/test/CodeGen/ARM/debug-info-s16-reg.ll
+++ b/test/CodeGen/ARM/debug-info-s16-reg.ll
@@ -1,9 +1,11 @@
; RUN: llc < %s - | FileCheck %s
; Radar 9309221
; Test dwarf reg no for s16
-;CHECK: DW_OP_regx for S register
+;CHECK: super-register
+;CHECK-NEXT: DW_OP_regx
;CHECK-NEXT: ascii
-;CHECK-NEXT: DW_OP_bit_piece 32 0
+;CHECK-NEXT: DW_OP_piece
+;CHECK-NEXT: 4
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
target triple = "thumbv7-apple-macosx10.6.7"