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author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
---|---|---|
committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | 7c9c6ed761bf9d28c0c257a045b35781969136e0 (patch) | |
tree | 508cac951011b10e2817eacecc1fa640bbdba51e /test/CodeGen/ARM/atomic-load-store.ll | |
parent | dc64962c8649964d13cc60b83c8c400d5ae7504a (diff) |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/atomic-load-store.ll')
-rw-r--r-- | test/CodeGen/ARM/atomic-load-store.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/ARM/atomic-load-store.ll b/test/CodeGen/ARM/atomic-load-store.ll index af13dfc80d2..5db81781a7f 100644 --- a/test/CodeGen/ARM/atomic-load-store.ll +++ b/test/CodeGen/ARM/atomic-load-store.ll @@ -44,7 +44,7 @@ define i32 @test2(i32* %ptr) { ; THUMBM-LABEL: test2 ; THUMBM: ldr ; THUMBM: dmb sy - %val = load atomic i32* %ptr seq_cst, align 4 + %val = load atomic i32, i32* %ptr seq_cst, align 4 ret i32 %val } @@ -76,7 +76,7 @@ define void @test3(i8* %ptr1, i8* %ptr2) { ; ARMV6-NOT: mcr ; THUMBM-LABEL: test3 ; THUMBM-NOT: dmb sy - %val = load atomic i8* %ptr1 unordered, align 1 + %val = load atomic i8, i8* %ptr1 unordered, align 1 store atomic i8 %val, i8* %ptr2 unordered, align 1 ret void } @@ -87,7 +87,7 @@ define void @test4(i8* %ptr1, i8* %ptr2) { ; THUMBONE: ___sync_lock_test_and_set_1 ; ARMV6-LABEL: test4 ; THUMBM-LABEL: test4 - %val = load atomic i8* %ptr1 seq_cst, align 1 + %val = load atomic i8, i8* %ptr1 seq_cst, align 1 store atomic i8 %val, i8* %ptr2 seq_cst, align 1 ret void } @@ -95,7 +95,7 @@ define void @test4(i8* %ptr1, i8* %ptr2) { define i64 @test_old_load_64bit(i64* %p) { ; ARMV4-LABEL: test_old_load_64bit ; ARMV4: ___sync_val_compare_and_swap_8 - %1 = load atomic i64* %p seq_cst, align 8 + %1 = load atomic i64, i64* %p seq_cst, align 8 ret i64 %1 } |