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author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-11-30 18:48:35 +0000 |
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committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-11-30 18:48:35 +0000 |
commit | d993b016d170e441de08153dfc349dbaafe44826 (patch) | |
tree | 2626a61a4caaa0fe70f4c7dda6eccf2b69393fd6 /test/CodeGen/ARM/GlobalISel/arm-isel.ll | |
parent | 47856b25a74f4676cbcd3a38b9db221dc5a182b3 (diff) |
[globalisel][tablegen] Add support for specific immediates in the match pattern
This enables a few rules such as ARM's uxtb instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319457 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/GlobalISel/arm-isel.ll')
-rw-r--r-- | test/CodeGen/ARM/GlobalISel/arm-isel.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/GlobalISel/arm-isel.ll b/test/CodeGen/ARM/GlobalISel/arm-isel.ll index 579101e2d2a..7162815a7f7 100644 --- a/test/CodeGen/ARM/GlobalISel/arm-isel.ll +++ b/test/CodeGen/ARM/GlobalISel/arm-isel.ll @@ -35,7 +35,7 @@ entry: define zeroext i8 @test_ext_i8(i8 %x) { ; CHECK-LABEL: test_ext_i8: -; CHECK: and r0, r0, #255 +; CHECK: uxtb r0, r0 ; CHECK: bx lr entry: |