diff options
| author | Cameron Zwarich <zwarich@apple.com> | 2011-04-15 20:28:28 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-04-15 20:28:28 +0000 |
| commit | ca3f6a3925e9a6e91022aa211bdc1b6e3f2ff41f (patch) | |
| tree | 9b6631b0f0408e53862d718106fa38ccd6ee399d /test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll | |
| parent | 99a2e98eddf00c4afd3817564cb8c914a6f66ae9 (diff) | |
Add missing register forms of instructions to the ARM CMP-folding code. This
fixes <rdar://problem/9287901>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129599 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll')
| -rw-r--r-- | test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll b/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll new file mode 100644 index 00000000000..a98d3f6ba92 --- /dev/null +++ b/test/CodeGen/ARM/2011-04-15-RegisterCmpPeephole.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 | FileCheck %s + +; CHECK: _f +; CHECK: adds +; CHECK-NOT: cmp +; CHECK: blxeq _g + +define i32 @f(i32 %a, i32 %b) nounwind ssp { +entry: + %add = add nsw i32 %b, %a + %cmp = icmp eq i32 %add, 0 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + tail call void (...)* @g(i32 %a, i32 %b) nounwind + br label %if.end + +if.end: ; preds = %if.then, %entry + ret i32 %add +} + +declare void @g(...) |