diff options
author | Bob Wilson <bob.wilson@apple.com> | 2010-10-26 00:02:24 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-10-26 00:02:24 +0000 |
commit | 7c730e77908123a83abcfffe781d368e9b873ce9 (patch) | |
tree | c8421e1413b609f7702a08129984eb7a4c0946ab /test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll | |
parent | 2ad40d34947ced36d96f351f6c2a4d57a044e2a4 (diff) |
When the "true" and "false" blocks of a diamond if-conversion are the same,
do not double-count the duplicate instructions by counting once from the
beginning and again from the end. Keep track of where the duplicates from
the beginning ended and don't go past that point when counting duplicates
at the end. Radar 8589805.
This change causes one of the MC/ARM/simple-fp-encoding tests to produce
different (better!) code without the vmovne instruction being tested.
I changed the test to produce vmovne and vmoveq instructions but moving
between register files in the opposite direction. That's not quite the same
but predicated versions of those instructions weren't being tested before,
so at least the test coverage is not any worse, just different.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117333 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll')
-rw-r--r-- | test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll b/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll new file mode 100644 index 00000000000..2789ccd5cf5 --- /dev/null +++ b/test/CodeGen/ARM/2010-10-25-ifcvt-ldm.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=arm1136jf-s | FileCheck %s +; Radar 8589805: Counting the number of microcoded operations, such as for an +; LDM instruction, was causing an assertion failure because the microop count +; was being treated as an instruction count. + +; CHECK: ldmia +; CHECK: ldmia +; CHECK: ldmia +; CHECK: ldmia + +define i32 @test(i32 %x) { +entry: + %0 = tail call signext i16 undef(i32* undef) + switch i32 undef, label %bb3 [ + i32 0, label %bb4 + i32 1, label %bb1 + i32 2, label %bb2 + ] + +bb1: + ret i32 1 + +bb2: + ret i32 2 + +bb3: + ret i32 1 + +bb4: + ret i32 3 +} |