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author | Quentin Colombet <qcolombet@apple.com> | 2017-10-16 22:28:38 +0000 |
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committer | Quentin Colombet <qcolombet@apple.com> | 2017-10-16 22:28:38 +0000 |
commit | e4ffbabdc0c427086b7046ba13e1e7450689b9cc (patch) | |
tree | a6b37de31ec6dae930276776026e2e9d20b1766b /test/CodeGen/AArch64 | |
parent | 7ff760d050a8e941f649e1d3d350d48828ba7d5b (diff) |
[AArch64][RegisterBankInfo] Add mapping support for G_BITCAST of s128
Anything bigger than 64-bit just map to FPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315946 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64')
-rw-r--r-- | test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir b/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir index 296f65c041a..1d4781a9d98 100644 --- a/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir +++ b/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir @@ -66,6 +66,7 @@ define void @bitcast_s64_fpr() { ret void } define void @bitcast_s64_gpr_fpr() { ret void } define void @bitcast_s64_fpr_gpr() { ret void } + define void @bitcast_s128() { ret void } define i64 @greedyWithChainOfComputation(i64 %arg1, <2 x i32>* %addr) { %varg1 = bitcast i64 %arg1 to <2 x i32> @@ -616,6 +617,32 @@ body: | ... --- +# CHECK-LABEL: name: bitcast_s128 +name: bitcast_s128 +legalized: true +tracksRegLiveness: true +registers: + - { id: 0, class: _} + - { id: 1, class: _} + - { id: 2, class: _} + - { id: 3, class: _} +# CHECK: registers: +# CHECK: - { id: 2, class: fpr, preferred-register: '' } +# CHECK: - { id: 3, class: fpr, preferred-register: '' } +# CHECK: %2(<2 x s64>) = G_BITCAST %3(s128) +body: | + bb.1: + liveins: %x0, %x1 + %0(s64) = COPY %x0 + %1(s64) = COPY %x1 + %3(s128) = G_MERGE_VALUES %0(s64), %1(s64) + %2(<2 x s64>) = G_BITCAST %3(s128) + %q0 = COPY %2(<2 x s64>) + RET_ReallyLR implicit %q0 + +... + +--- # Make sure the greedy mode is able to take advantage of the # alternative mappings of G_LOAD to coalesce the whole chain # of computation on GPR. |