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author | Tim Northover <tnorthover@apple.com> | 2014-04-16 11:52:51 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-04-16 11:52:51 +0000 |
commit | fef8e383eb8c0dc534c7cac98b3670dec2cc86fb (patch) | |
tree | 30177c4f31c2bff05701633d347412f874b22353 /test/CodeGen/AArch64/i128-align.ll | |
parent | ea9988a81231d4097efe6799f7e2f4922dab2d7f (diff) |
ARM64: use 32-bit moves for constants where possible.
If we know that a particular 64-bit constant has all high bits zero, then we
can rely on the fact that 32-bit ARM64 instructions automatically zero out the
high bits of an x-register. This gives the expansion logic less constraints to
satisfy and so sometimes allows it to pick better sequences.
Came up while porting test/CodeGen/AArch64/movw-consts.ll: this will allow a
32-bit MOVN to be used in @test8 soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206379 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64/i128-align.ll')
-rw-r--r-- | test/CodeGen/AArch64/i128-align.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/AArch64/i128-align.ll b/test/CodeGen/AArch64/i128-align.ll index 765e868cfc0..fb363a9591b 100644 --- a/test/CodeGen/AArch64/i128-align.ll +++ b/test/CodeGen/AArch64/i128-align.ll @@ -14,7 +14,7 @@ define i64 @check_size() { %diff = sub i64 %endi, %starti ret i64 %diff -; CHECK: {{movz x0, #48|orr x0, xzr, #0x30}} +; CHECK: {{movz x0, #48|orr w0, wzr, #0x30}} } define i64 @check_field() { @@ -26,5 +26,5 @@ define i64 @check_field() { %diff = sub i64 %endi, %starti ret i64 %diff -; CHECK: {{movz x0, #16|orr x0, xzr, #0x10}} +; CHECK: {{movz x0, #16|orr w0, wzr, #0x10}} } |