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| author | Paul Osmialowski <pawel.osmialowski@arm.com> | 2016-05-13 18:00:09 +0000 |
|---|---|---|
| committer | Paul Osmialowski <pawel.osmialowski@arm.com> | 2016-05-13 18:00:09 +0000 |
| commit | 0b30fc60108b2f20a01a35df9f66e006b306e680 (patch) | |
| tree | 3ba16d79cbbd1f980737afa9edf95a52609a8b09 /test/CodeGen/AArch64/bitreverse.ll | |
| parent | 5cf889e4f5ad2b40665ecd976543be73e240b48c (diff) | |
add support for -print-imm-hex for AArch64
Most immediates are printed in Aarch64InstPrinter using 'formatImm' macro,
but not all of them.
Implementation contains following rules:
- floating point immediates are always printed as decimal
- signed integer immediates are printed depends on flag settings
(for negative values 'formatImm' macro prints the value as i.e -0x01
which may be convenient when imm is an address or offset)
- logical immediates are always printed as hex
- the 64-bit immediate for advSIMD, encoded in "a:b:c:d:e:f:g:h" is always printed as hex
- the 64-bit immedaite in exception generation instructions like:
brk, dcps1, dcps2, dcps3, hlt, hvc, smc, svc is always printed as hex
- the rest of immediates is printed depends on availability
of -print-imm-hex
Signed-off-by: Maciej Gabka <maciej.gabka@arm.com>
Signed-off-by: Paul Osmialowski <pawel.osmialowski@arm.com>
Differential Revision: http://reviews.llvm.org/D16929
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269446 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/AArch64/bitreverse.ll')
| -rw-r--r-- | test/CodeGen/AArch64/bitreverse.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/test/CodeGen/AArch64/bitreverse.ll b/test/CodeGen/AArch64/bitreverse.ll index 762afe62efd..2538ffdbd6c 100644 --- a/test/CodeGen/AArch64/bitreverse.ll +++ b/test/CodeGen/AArch64/bitreverse.ll @@ -48,14 +48,14 @@ define <8 x i8> @g_vec(<8 x i8> %a) { ; Try and match as much of the sequence as precisely as possible. ; CHECK-LABEL: g_vec: -; CHECK-DAG: movi [[M1:v.*]], #0x80 -; CHECK-DAG: movi [[M2:v.*]], #0x40 -; CHECK-DAG: movi [[M3:v.*]], #0x20 -; CHECK-DAG: movi [[M4:v.*]], #0x10 -; CHECK-DAG: movi [[M5:v.*]], #0x8 -; CHECK-DAG: movi [[M6:v.*]], #0x4{{$}} -; CHECK-DAG: movi [[M7:v.*]], #0x2{{$}} -; CHECK-DAG: movi [[M8:v.*]], #0x1{{$}} +; CHECK-DAG: movi [[M1:v.*]], #128 +; CHECK-DAG: movi [[M2:v.*]], #64 +; CHECK-DAG: movi [[M3:v.*]], #32 +; CHECK-DAG: movi [[M4:v.*]], #16 +; CHECK-DAG: movi [[M5:v.*]], #8 +; CHECK-DAG: movi [[M6:v.*]], #4{{$}} +; CHECK-DAG: movi [[M7:v.*]], #2{{$}} +; CHECK-DAG: movi [[M8:v.*]], #1{{$}} ; CHECK-DAG: shl [[S1:v.*]], v0.8b, #7 ; CHECK-DAG: shl [[S2:v.*]], v0.8b, #5 ; CHECK-DAG: shl [[S3:v.*]], v0.8b, #3 |