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authorAhmed Bougacha <ahmed.bougacha@gmail.com>2016-08-02 16:49:22 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2016-08-02 16:49:22 +0000
commit35426be67b7da1c06aa4555c0072f9d2394233e6 (patch)
treeafb4f8a177772fc5227be2186371ae6a474337ec /lib
parentfc114db3c4f7eb0bc5b23c0e560b69227f6f5a1e (diff)
[GlobalISel] Verify Selected MF property.
After instruction selection, there should be no pre-isel generic instructions remaining, nor should generic virtual registers be used. Verify that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277483 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/MachineVerifier.cpp16
1 files changed, 15 insertions, 1 deletions
diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp
index 9161cda5184..6354c7c0872 100644
--- a/lib/CodeGen/MachineVerifier.cpp
+++ b/lib/CodeGen/MachineVerifier.cpp
@@ -72,6 +72,7 @@ namespace {
// Avoid querying the MachineFunctionProperties for each operand.
bool isFunctionRegBankSelected;
+ bool isFunctionSelected;
typedef SmallVector<unsigned, 16> RegVector;
typedef SmallVector<const uint32_t*, 4> RegMaskVector;
@@ -335,6 +336,8 @@ unsigned MachineVerifier::verify(MachineFunction &MF) {
isFunctionRegBankSelected = MF.getProperties().hasProperty(
MachineFunctionProperties::Property::RegBankSelected);
+ isFunctionSelected = MF.getProperties().hasProperty(
+ MachineFunctionProperties::Property::Selected);
LiveVars = nullptr;
LiveInts = nullptr;
@@ -887,6 +890,9 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
// Check types.
const unsigned NumTypes = MI->getNumTypes();
if (isPreISelGenericOpcode(MCID.getOpcode())) {
+ if (isFunctionSelected)
+ report("Unexpected generic instruction in a Selected function", MI);
+
if (NumTypes == 0)
report("Generic instruction must have a type", MI);
} else {
@@ -1003,7 +1009,15 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) {
const TargetRegisterClass *RC = MRI->getRegClassOrNull(Reg);
if (!RC) {
// This is a generic virtual register.
- // It must have a size and it must not have a SubIdx.
+
+ // If we're post-Select, we can't have gvregs anymore.
+ if (isFunctionSelected) {
+ report("Generic virtual register invalid in a Selected function",
+ MO, MONum);
+ return;
+ }
+
+ // The gvreg must have a size and it must not have a SubIdx.
unsigned Size = MRI->getSize(Reg);
if (!Size) {
report("Generic virtual register must have a size", MO, MONum);