diff options
author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 16:17:10 +0000 |
---|---|---|
committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 16:17:10 +0000 |
commit | 31c3e4f36316f677bf33f2a976bd39290e7deb50 (patch) | |
tree | f9cfc2081fe6f50e509f98455f8e2d87bd1002f7 /lib | |
parent | 155b8551c65a1577cd5d73554527a7a7113c12df (diff) |
[GlobalISel] Add RegBankSelected MachineFunction property.
RegBankSelected: the RegBankSelect pass ran and all generic virtual
registers have been assigned to a register bank.
This lets us enforce certain invariants across passes.
This property is GlobalISel-specific, but is always available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277475 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/MIRParser/MIRParser.cpp | 3 | ||||
-rw-r--r-- | lib/CodeGen/MIRPrinter.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/MachineFunction.cpp | 3 |
3 files changed, 8 insertions, 0 deletions
diff --git a/lib/CodeGen/MIRParser/MIRParser.cpp b/lib/CodeGen/MIRParser/MIRParser.cpp index 035b0ae5246..fcec6deb100 100644 --- a/lib/CodeGen/MIRParser/MIRParser.cpp +++ b/lib/CodeGen/MIRParser/MIRParser.cpp @@ -295,6 +295,9 @@ bool MIRParserImpl::initializeMachineFunction(MachineFunction &MF) { if (YamlMF.Legalized) MF.getProperties().set(MachineFunctionProperties::Property::Legalized); + if (YamlMF.RegBankSelected) + MF.getProperties().set( + MachineFunctionProperties::Property::RegBankSelected); PerFunctionMIParsingState PFS(MF, SM, IRSlots); if (initializeRegisterInfo(PFS, YamlMF)) diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp index fdd7a42ac62..d08feec0046 100644 --- a/lib/CodeGen/MIRPrinter.cpp +++ b/lib/CodeGen/MIRPrinter.cpp @@ -180,6 +180,8 @@ void MIRPrinter::print(const MachineFunction &MF) { YamlMF.Legalized = MF.getProperties().hasProperty( MachineFunctionProperties::Property::Legalized); + YamlMF.RegBankSelected = MF.getProperties().hasProperty( + MachineFunctionProperties::Property::RegBankSelected); convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo()); ModuleSlotTracker MST(MF.getFunction()->getParent()); diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index 202cf3cdf03..6cd3b65b294 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -79,6 +79,9 @@ void MachineFunctionProperties::print(raw_ostream &ROS, bool OnlySet) const { case Property::Legalized: ROS << (HasProperty ? "" : "not ") << "legalized"; break; + case Property::RegBankSelected: + ROS << (HasProperty ? "" : "not ") << "RegBank-selected"; + break; default: break; } |