diff options
author | Alex Bradbury <asb@lowrisc.org> | 2017-12-12 16:10:21 +0000 |
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committer | Alex Bradbury <asb@lowrisc.org> | 2017-12-12 16:10:21 +0000 |
commit | 2a45601d8da468c75168e66a90d2cff9cced1285 (patch) | |
tree | 901decdbf800c0381dd4bd535b89733b0dc40479 /lib | |
parent | 1af98f193cbc27611f888cd497835a648baaa0bf (diff) |
[RISCV][NFC] Formatting fix in RISCVInstrInfo.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320491 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r-- | lib/Target/RISCV/RISCVInstrInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/RISCV/RISCVInstrInfo.td b/lib/Target/RISCV/RISCVInstrInfo.td index b4450027439..fa0af15549b 100644 --- a/lib/Target/RISCV/RISCVInstrInfo.td +++ b/lib/Target/RISCV/RISCVInstrInfo.td @@ -190,13 +190,13 @@ class ALU_rr<bits<7> funct7, bits<3> funct3, string opcodestr> opcodestr, "$rd, $rs1, $rs2">; let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in -class CSR_ir<bits<3> funct3, string opcodestr> : - RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), (ins uimm12:$imm12, GPR:$rs1), +class CSR_ir<bits<3> funct3, string opcodestr> + : RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), (ins uimm12:$imm12, GPR:$rs1), opcodestr, "$rd, $imm12, $rs1">; let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in -class CSR_ii<bits<3> funct3, string opcodestr> : - RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), +class CSR_ii<bits<3> funct3, string opcodestr> + : RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), (ins uimm12:$imm12, uimm5:$rs1), opcodestr, "$rd, $imm12, $rs1">; |