diff options
| author | Diana Picus <diana.picus@linaro.org> | 2017-12-18 13:22:28 +0000 |
|---|---|---|
| committer | Diana Picus <diana.picus@linaro.org> | 2017-12-18 13:22:28 +0000 |
| commit | 1346bcc16e7f7d43e2c3f25c8b978bb6d1e864e9 (patch) | |
| tree | 06011610cc7b071c8dc7ac9b9167200e3358ad0d /lib | |
| parent | afb887543b8287b619be73cd6d1f8c75f199aa43 (diff) | |
[ARM GlobalISel] Fix G_(UN)MERGE_VALUES handling after r319524
r319524 has made more G_MERGE_VALUES/G_UNMERGE_VALUES pairs legal than
are supported by the rest of the pipeline. Restrict that to only the
cases that we can currently handle: packing 32-bit values into 64-bit
ones, when we have hardware FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320980 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMLegalizerInfo.cpp | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/lib/Target/ARM/ARMLegalizerInfo.cpp b/lib/Target/ARM/ARMLegalizerInfo.cpp index ddcdb1ff42f..2dd1dff64e8 100644 --- a/lib/Target/ARM/ARMLegalizerInfo.cpp +++ b/lib/Target/ARM/ARMLegalizerInfo.cpp @@ -158,6 +158,11 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { setAction({G_FCMP, s1}, Legal); setAction({G_FCMP, 1, s32}, Legal); setAction({G_FCMP, 1, s64}, Legal); + + setAction({G_MERGE_VALUES, s64}, Legal); + setAction({G_MERGE_VALUES, 1, s32}, Legal); + setAction({G_UNMERGE_VALUES, s32}, Legal); + setAction({G_UNMERGE_VALUES, 1, s64}, Legal); } else { for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV}) for (auto Ty : {s32, s64}) @@ -177,15 +182,6 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { for (auto Ty : {s32, s64}) setAction({Op, Ty}, Libcall); - // Merge/Unmerge - for (const auto &Ty : {s32, s64}) { - setAction({G_MERGE_VALUES, Ty}, Legal); - setAction({G_UNMERGE_VALUES, 1, Ty}, Legal); - } - for (const auto &Ty : {s16, s32}) { - setAction({G_MERGE_VALUES, 1, Ty}, Legal); - setAction({G_UNMERGE_VALUES, Ty}, Legal); - } computeTables(); } |