summaryrefslogtreecommitdiff
path: root/lib/Transforms
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2017-12-26 22:12:20 +0000
committerSanjay Patel <spatel@rotateright.com>2017-12-26 22:12:20 +0000
commitf186f082c569f37f10f8ef73ecad4b27d9359cab (patch)
treee629adefeeb7bd0c01b51392e655da93dbd8e863 /lib/Transforms
parent422276fb4418bdc597adbd266a1a90ea049938e5 (diff)
[InstCombine] fix miscompile of frem with 0.0 operand (PR34870)
We might want to select NAN here or do this transform with fast-math, but this should at least fix the miscompile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321461 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Transforms')
-rw-r--r--lib/Transforms/InstCombine/InstCombineMulDivRem.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 87666360c1a..541dde6c47d 100644
--- a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1631,9 +1631,5 @@ Instruction *InstCombiner::visitFRem(BinaryOperator &I) {
SQ.getWithInstruction(&I)))
return replaceInstUsesWith(I, V);
- // Handle cases involving: rem X, (select Cond, Y, Z)
- if (simplifyDivRemOfSelectWithZeroOp(I))
- return &I;
-
return nullptr;
}