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authorRafael Espindola <rafael.espindola@gmail.com>2017-08-03 02:16:21 +0000
committerRafael Espindola <rafael.espindola@gmail.com>2017-08-03 02:16:21 +0000
commit9aafb854cc7cb8df8338c50cb411a54ce1e09796 (patch)
tree904ca934d72726b3c0e0736d9027056ee11751a7 /lib/Target/XCore
parent65d41d8235523f0913767507b6c816e16caa2594 (diff)
Delete Default and JITDefault code models
IMHO it is an antipattern to have a enum value that is Default. At any given piece of code it is not clear if we have to handle Default or if has already been mapped to a concrete value. In this case in particular, only the target can do the mapping and it is nice to make sure it is always done. This deletes the two default enum values of CodeModel and uses an explicit Optional<CodeModel> when it is possible that it is unspecified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309911 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore')
-rw-r--r--lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp13
-rw-r--r--lib/Target/XCore/XCoreTargetMachine.cpp16
-rw-r--r--lib/Target/XCore/XCoreTargetMachine.h4
3 files changed, 15 insertions, 18 deletions
diff --git a/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
index dd27e7ca30a..805f1c18b60 100644
--- a/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
+++ b/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
@@ -65,15 +65,6 @@ static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI,
return MAI;
}
-static void adjustCodeGenOpts(const Triple &TT, Reloc::Model RM,
- CodeModel::Model &CM) {
- if (CM == CodeModel::Default) {
- CM = CodeModel::Small;
- }
- if (CM != CodeModel::Small && CM != CodeModel::Large)
- report_fatal_error("Target only supports CodeModel Small or Large");
-}
-
static MCInstPrinter *createXCoreMCInstPrinter(const Triple &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI,
@@ -134,10 +125,6 @@ extern "C" void LLVMInitializeXCoreTargetMC() {
// Register the MC asm info.
RegisterMCAsmInfoFn X(getTheXCoreTarget(), createXCoreMCAsmInfo);
- // Register the MC codegen info.
- TargetRegistry::registerMCAdjustCodeGenOpts(getTheXCoreTarget(),
- adjustCodeGenOpts);
-
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(getTheXCoreTarget(),
createXCoreMCInstrInfo);
diff --git a/lib/Target/XCore/XCoreTargetMachine.cpp b/lib/Target/XCore/XCoreTargetMachine.cpp
index cb23399995d..3aa7187e0cd 100644
--- a/lib/Target/XCore/XCoreTargetMachine.cpp
+++ b/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -31,17 +31,27 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
return *RM;
}
+static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) {
+ if (CM) {
+ if (*CM != CodeModel::Small && *CM != CodeModel::Large)
+ report_fatal_error("Target only supports CodeModel Small or Large");
+ return *CM;
+ }
+ return CodeModel::Small;
+}
+
/// Create an ILP32 architecture model
///
XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
StringRef CPU, StringRef FS,
const TargetOptions &Options,
Optional<Reloc::Model> RM,
- CodeModel::Model CM,
- CodeGenOpt::Level OL)
+ Optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT)
: LLVMTargetMachine(
T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
- TT, CPU, FS, Options, getEffectiveRelocModel(RM), CM, OL),
+ TT, CPU, FS, Options, getEffectiveRelocModel(RM),
+ getEffectiveCodeModel(CM), OL),
TLOF(llvm::make_unique<XCoreTargetObjectFile>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
diff --git a/lib/Target/XCore/XCoreTargetMachine.h b/lib/Target/XCore/XCoreTargetMachine.h
index a047b3c9d9f..5baa3524d2a 100644
--- a/lib/Target/XCore/XCoreTargetMachine.h
+++ b/lib/Target/XCore/XCoreTargetMachine.h
@@ -31,8 +31,8 @@ class XCoreTargetMachine : public LLVMTargetMachine {
public:
XCoreTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
- Optional<Reloc::Model> RM, CodeModel::Model CM,
- CodeGenOpt::Level OL);
+ Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
+ CodeGenOpt::Level OL, bool JIT);
~XCoreTargetMachine() override;
const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }