diff options
| author | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-03-19 14:14:20 +0000 |
|---|---|---|
| committer | Nicolai Haehnle <nhaehnle@gmail.com> | 2018-03-19 14:14:20 +0000 |
| commit | c9cc57b52dc4203134b074f8370f4b073e17fc0a (patch) | |
| tree | f34704fe83f23594f1c392da7f7cab66ee127b26 /lib/Target/SystemZ | |
| parent | 0715b9ec56548590c0a46b82730d918d7df967d4 (diff) | |
TableGen: Check the dynamic type of !cast<Rec>(string)
Summary:
The docs already claim that this happens, but so far it hasn't. As a
consequence, existing TableGen files get this wrong a lot, but luckily
the fixes are all reasonably straightforward.
To make this work with all the existing forms of self-references (since
the true type of a record is only built up over time), the lookup of
self-references in !cast is delayed until the final resolving step.
Change-Id: If5923a72a252ba2fbc81a889d59775df0ef31164
Reviewers: arsenm, craig.topper, tra, MartinO
Subscribers: wdng, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D44475
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327849 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/SystemZ')
| -rw-r--r-- | lib/Target/SystemZ/SystemZOperands.td | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/SystemZ/SystemZOperands.td b/lib/Target/SystemZ/SystemZOperands.td index 713612129d9..8171eae6460 100644 --- a/lib/Target/SystemZ/SystemZOperands.td +++ b/lib/Target/SystemZ/SystemZOperands.td @@ -115,13 +115,13 @@ class AddressingMode<string seltype, string bitsize, string dispsize, class BDMode<string type, string bitsize, string dispsize, string suffix> : AddressingMode<type, bitsize, dispsize, suffix, "", 2, "BDAddr", (ops !cast<RegisterOperand>("ADDR"##bitsize), - !cast<Immediate>("disp"##dispsize##"imm"##bitsize))>; + !cast<Operand>("disp"##dispsize##"imm"##bitsize))>; // An addressing mode with a base, displacement and index. class BDXMode<string type, string bitsize, string dispsize, string suffix> : AddressingMode<type, bitsize, dispsize, suffix, "", 3, "BDXAddr", (ops !cast<RegisterOperand>("ADDR"##bitsize), - !cast<Immediate>("disp"##dispsize##"imm"##bitsize), + !cast<Operand>("disp"##dispsize##"imm"##bitsize), !cast<RegisterOperand>("ADDR"##bitsize))>; // A BDMode paired with an immediate length operand of LENSIZE bits. @@ -130,21 +130,21 @@ class BDLMode<string type, string bitsize, string dispsize, string suffix, : AddressingMode<type, bitsize, dispsize, suffix, "Len"##lensize, 3, "BDLAddr", (ops !cast<RegisterOperand>("ADDR"##bitsize), - !cast<Immediate>("disp"##dispsize##"imm"##bitsize), - !cast<Immediate>("imm"##bitsize))>; + !cast<Operand>("disp"##dispsize##"imm"##bitsize), + !cast<Operand>("imm"##bitsize))>; // A BDMode paired with a register length operand. class BDRMode<string type, string bitsize, string dispsize, string suffix> : AddressingMode<type, bitsize, dispsize, suffix, "", 3, "BDRAddr", (ops !cast<RegisterOperand>("ADDR"##bitsize), - !cast<Immediate>("disp"##dispsize##"imm"##bitsize), + !cast<Operand>("disp"##dispsize##"imm"##bitsize), !cast<RegisterOperand>("GR"##bitsize))>; // An addressing mode with a base, displacement and a vector index. class BDVMode<string bitsize, string dispsize> : AddressOperand<bitsize, dispsize, "", "BDVAddr", (ops !cast<RegisterOperand>("ADDR"##bitsize), - !cast<Immediate>("disp"##dispsize##"imm"##bitsize), + !cast<Operand>("disp"##dispsize##"imm"##bitsize), !cast<RegisterOperand>("VR128"))>; //===----------------------------------------------------------------------===// |