Add trivial subtarget support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25641 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 16 insertions, 0 deletions

diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td
index dabb0dc9760..cd06886e1b7 100644
--- a/lib/Target/Sparc/Sparc.td
+++ b/lib/Target/Sparc/Sparc.td
@@ -17,6 +17,14 @@
 include "../Target.td"
 
 //===----------------------------------------------------------------------===//
+// PowerPC Subtarget features.
+//
+ 
+def Feature64Bit     : SubtargetFeature<"64bit", "bool", "Is64Bit",
+                                        "Enable 64-bit instructions">;
+
+
+//===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//
 
@@ -37,6 +45,14 @@ def SparcV8InstrInfo : InstrInfo {
 }
 
 //===----------------------------------------------------------------------===//
+// SPARC processors supported.
+//===----------------------------------------------------------------------===//
+
+def : Processor<"generic", NoItineraries, []>;
+def : Processor<"v8", NoItineraries, []>;
+def : Processor<"v9", NoItineraries, [Feature64Bit]>;
+
+//===----------------------------------------------------------------------===//
 // Declare the target which we are implementing
 //===----------------------------------------------------------------------===//