diff options
| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 03:39:39 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-03-02 03:39:39 +0000 |
| commit | afad335cae8d1c811e2d4a9de843a36d36b4e8c5 (patch) | |
| tree | 3635fcf8152acb693c12bfadec4981b48f9ac5d2 /lib/Target/Sparc/Disassembler | |
| parent | 80949c599fb8b2c5d14c517d2ef94ad974989a37 (diff) | |
[Sparc] Add support for parsing fcmp with %fcc registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Sparc/Disassembler')
| -rw-r--r-- | lib/Target/Sparc/Disassembler/SparcDisassembler.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp index e8314f23842..e01196cbccb 100644 --- a/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp +++ b/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp @@ -113,6 +113,9 @@ static const unsigned QFPRegDecoderTable[] = { SP::Q6, SP::Q14, ~0U, ~0U, SP::Q7, SP::Q15, ~0U, ~0U } ; +static const unsigned FCCRegDecoderTable[] = { + SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 }; + static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, @@ -174,6 +177,16 @@ static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, return MCDisassembler::Success; } +static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t Address, + const void *Decoder) { + if (RegNo > 3) + return MCDisassembler::Fail; + Inst.addOperand(MCOperand::CreateReg(FCCRegDecoderTable[RegNo])); + return MCDisassembler::Success; +} + + static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder); static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, |