diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-14 20:43:16 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-14 20:43:16 +0000 |
| commit | 93e6e5414ded14bcbb233baaaa5567132fee9a0c (patch) | |
| tree | a069641041c8edaa176ddbbc1e9a3584b17bac28 /lib/Target/PowerPC | |
| parent | 9becdeed481ffdbf451934cbcdb1b9e299233ee3 (diff) | |
Finish renaming remaining analyzeBranch functions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@281535 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index d5ccc4dc723..8cbd71ec048 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -605,7 +605,7 @@ bool PPCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, return true; } -unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB, +unsigned PPCInstrInfo::removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const { assert(!BytesRemoved && "code size not handled"); @@ -1204,7 +1204,7 @@ PPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, } bool PPCInstrInfo:: -ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { +reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { assert(Cond.size() == 2 && "Invalid PPC branch opcode!"); if (Cond[1].getReg() == PPC::CTR8 || Cond[1].getReg() == PPC::CTR) Cond[0].setImm(Cond[0].getImm() == 0 ? 1 : 0); diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h index 8a206964675..b1988dee18f 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.h +++ b/lib/Target/PowerPC/PPCInstrInfo.h @@ -168,7 +168,7 @@ public: MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const override; - unsigned RemoveBranch(MachineBasicBlock &MBB, + unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved = nullptr) const override; unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, @@ -200,7 +200,7 @@ public: const TargetRegisterInfo *TRI) const override; bool - ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; + reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg, MachineRegisterInfo *MRI) const override; |