diff options
| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-05-31 05:40:25 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2017-05-31 05:40:25 +0000 |
| commit | 1c7bf566f8b024970717c7bf019f52e647d6ae8c (patch) | |
| tree | f34c94e9e114d15f9500bbc3d21523a9ce7326f5 /lib/Target/PowerPC/PPCInstrInfo.cpp | |
| parent | 24c1e7771ad31499dcf75129ec45ef088f40f9cf (diff) | |
[PowerPC] Eliminate integer compare instructions - vol. 2
This patch builds upon https://reviews.llvm.org/rL302810 to add
handling for bitwise logical operations in general purpose registers.
The idea is to keep the values in GPRs as long as possible - only
extracting them to a condition register bit when no further operations
are to be done.
Differential Revision: https://reviews.llvm.org/D31851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304282 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.cpp')
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index fd6785e963a..f3c68c443b1 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -1983,3 +1983,7 @@ PPCInstrInfo::updatedRC(const TargetRegisterClass *RC) const { return &PPC::VSRCRegClass; return RC; } + +int PPCInstrInfo::getRecordFormOpcode(unsigned Opcode) { + return PPC::getRecordFormOpcode(Opcode); +} |