summaryrefslogtreecommitdiff
path: root/lib/Target/NVPTX/NVPTXRegisterInfo.td
diff options
context:
space:
mode:
authorJustin Holewinski <jholewinski@nvidia.com>2014-07-16 16:26:58 +0000
committerJustin Holewinski <jholewinski@nvidia.com>2014-07-16 16:26:58 +0000
commit7e6565112ba53dd84969793ba39151ca99e59b3c (patch)
treea25bd65712b0b5070abe7383a5a3f50cbd63fd2a /lib/Target/NVPTX/NVPTXRegisterInfo.td
parent1cafa00e2657eebbc7b935df27e2691fbf73ee6b (diff)
[NVPTX] Rename registers %fl -> %fd and %rl -> %rd
This matches the internal behavior of NVIDIA tools like libnvvm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213168 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/NVPTX/NVPTXRegisterInfo.td')
-rw-r--r--lib/Target/NVPTX/NVPTXRegisterInfo.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/NVPTX/NVPTXRegisterInfo.td b/lib/Target/NVPTX/NVPTXRegisterInfo.td
index 34822489481..efcee6b6f2b 100644
--- a/lib/Target/NVPTX/NVPTXRegisterInfo.td
+++ b/lib/Target/NVPTX/NVPTXRegisterInfo.td
@@ -35,9 +35,9 @@ foreach i = 0-4 in {
def P#i : NVPTXReg<"%p"#i>; // Predicate
def RS#i : NVPTXReg<"%rs"#i>; // 16-bit
def R#i : NVPTXReg<"%r"#i>; // 32-bit
- def RL#i : NVPTXReg<"%rl"#i>; // 64-bit
+ def RL#i : NVPTXReg<"%rd"#i>; // 64-bit
def F#i : NVPTXReg<"%f"#i>; // 32-bit float
- def FL#i : NVPTXReg<"%fl"#i>; // 64-bit float
+ def FL#i : NVPTXReg<"%fd"#i>; // 64-bit float
// Arguments
def ia#i : NVPTXReg<"%ia"#i>;