diff options
author | Alexander Richardson <arichardson.kde@gmail.com> | 2018-06-25 16:49:20 +0000 |
---|---|---|
committer | Alexander Richardson <arichardson.kde@gmail.com> | 2018-06-25 16:49:20 +0000 |
commit | e8508360bc0544c086058911cc8673d98f35aa4c (patch) | |
tree | 7b2a44198c3fd660021fe81d7cb4e66511a4cfdc /lib/Target/Mips | |
parent | 529b26551c9dd0420eb19801464708de507c6133 (diff) |
Add Triple::isMIPS()/isMIPS32()/isMIPS64(). NFC
There are quite a few if statements that enumerate all these cases. It gets
even worse in our fork of LLVM where we also have a Triple::cheri (which
is mips64 + CHERI instructions) and we had to update all if statements that
check for Triple::mips64 to also handle Triple::cheri. This patch helps to
reduce our diff to upstream and should also make some checks more readable.
Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D48548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335493 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 6 | ||||
-rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 9 | ||||
-rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 2 |
4 files changed, 6 insertions, 13 deletions
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index fb220715d48..3150057fd43 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -513,11 +513,7 @@ public: CpRestoreOffset = -1; const Triple &TheTriple = sti.getTargetTriple(); - if ((TheTriple.getArch() == Triple::mips) || - (TheTriple.getArch() == Triple::mips64)) - IsLittleEndian = false; - else - IsLittleEndian = true; + IsLittleEndian = TheTriple.isLittleEndian(); if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode()) report_fatal_error("microMIPS64R6 is not supported", false); diff --git a/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp b/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp index 498ea6fda4b..bf139088028 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp @@ -57,7 +57,7 @@ MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU, return MipsABIInfo::N64(); assert(Options.getABIName().empty() && "Unknown ABI option for MIPS"); - if (TT.getArch() == Triple::mips64 || TT.getArch() == Triple::mips64el) + if (TT.isMIPS64()) return MipsABIInfo::N64(); return MipsABIInfo::O32(); } diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp index f20a5b01c1b..f498d830c8f 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -21,16 +21,14 @@ void MipsMCAsmInfo::anchor() { } MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { IsLittleEndian = TheTriple.isLittleEndian(); - if ((TheTriple.getArch() == Triple::mips64el) || - (TheTriple.getArch() == Triple::mips64)) { + if (TheTriple.isMIPS64()) { CodePointerSize = CalleeSaveStackSlotSize = 8; } // FIXME: This condition isn't quite right but it's the best we can do until // this object can identify the ABI. It will misbehave when using O32 // on a mips64*-* triple. - if ((TheTriple.getArch() == Triple::mipsel) || - (TheTriple.getArch() == Triple::mips)) { + if (TheTriple.isMIPS32()) { PrivateGlobalPrefix = "$"; PrivateLabelPrefix = "$"; } @@ -54,8 +52,7 @@ MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { HasMipsExpressions = true; // Enable IAS by default for O32. - if (TheTriple.getArch() == Triple::mips || - TheTriple.getArch() == Triple::mipsel) + if (TheTriple.isMIPS32()) UseIntegratedAssembler = true; // Enable IAS by default for Debian mips64/mips64el. diff --git a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 0b242a27df4..ce208b7f98b 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -47,7 +47,7 @@ using namespace llvm; /// FIXME: Merge with the copy in MipsSubtarget.cpp StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { if (CPU.empty() || CPU == "generic") { - if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel) + if (TT.isMIPS32()) CPU = "mips32"; else CPU = "mips64"; |