diff options
author | Petar Jovanovic <petar.jovanovic@mips.com> | 2018-06-07 13:06:06 +0000 |
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committer | Petar Jovanovic <petar.jovanovic@mips.com> | 2018-06-07 13:06:06 +0000 |
commit | a1a3a0ed7a6d1faea5f22266dc9135f700c012e9 (patch) | |
tree | cd1d06e1252bfb1d01cae87b537ae08486a40269 /lib/Target/Mips | |
parent | 7a1c547b1898f4311a2abfe04ab7317b1abeae10 (diff) |
[Mips] Silencing warnings in instruction info (NFC)
isORCopyInst and isReadOrWriteToDSPReg functions were producing warning
that some statements my fall through.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D47876
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334194 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r-- | lib/Target/Mips/MipsSEInstrInfo.cpp | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/lib/Target/Mips/MipsSEInstrInfo.cpp b/lib/Target/Mips/MipsSEInstrInfo.cpp index 04c4fdb0b6a..7ffe4aff474 100644 --- a/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -181,31 +181,37 @@ void MipsSEInstrInfo::copyPhysReg(MachineBasicBlock &MBB, static bool isORCopyInst(const MachineInstr &MI) { switch (MI.getOpcode()) { + default: + break; case Mips::OR_MM: case Mips::OR: if (MI.getOperand(2).getReg() == Mips::ZERO) return true; + break; case Mips::OR64: if (MI.getOperand(2).getReg() == Mips::ZERO_64) return true; - default: - return false; + break; } + return false; } /// If @MI is WRDSP/RRDSP instruction return true with @isWrite set to true /// if it is WRDSP instruction. -static bool isReadOrWritToDSPReg(const MachineInstr &MI, bool &isWrite) { +static bool isReadOrWriteToDSPReg(const MachineInstr &MI, bool &isWrite) { switch (MI.getOpcode()) { - case Mips::WRDSP: - case Mips::WRDSP_MM: - isWrite = true; - case Mips::RDDSP: - case Mips::RDDSP_MM: - return true; - default: - return false; + default: + return false; + case Mips::WRDSP: + case Mips::WRDSP_MM: + isWrite = true; + break; + case Mips::RDDSP: + case Mips::RDDSP_MM: + isWrite = false; + break; } + return true; } /// We check for the common case of 'or', as it's MIPS' preferred instruction @@ -217,7 +223,7 @@ bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI, bool isDSPControlWrite = false; // Condition is made to match the creation of WRDSP/RDDSP copy instruction // from copyPhysReg function. - if (isReadOrWritToDSPReg(MI, isDSPControlWrite)) { + if (isReadOrWriteToDSPReg(MI, isDSPControlWrite)) { if (!MI.getOperand(1).isImm() || MI.getOperand(1).getImm() != (1<<4)) return false; else if (isDSPControlWrite) { |