diff options
| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-08-23 16:01:01 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-08-23 16:01:01 +0000 |
| commit | 7fd3acfecb6c8b9458ac90b24e99a54baeda8804 (patch) | |
| tree | 4195d79c88140895b8ff89c035561a33edd06e49 /lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | |
| parent | d2746eafa6b64faf80cf28c39fe99e4a63544fe5 (diff) | |
[Hexagon] Packetize return value setup with the return instruction
Commit r279241 unintentionally reverted that ability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279526 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonVLIWPacketizer.cpp')
| -rw-r--r-- | lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index 47892848261..fda30f00a9c 100644 --- a/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -339,7 +339,8 @@ bool HexagonPacketizerList::isNewifiable(const MachineInstr &MI, if (NewRC == &Hexagon::PredRegsRegClass) if (HII->isV60VectorInstruction(MI) && MI.mayStore()) return false; - return HII->isCondInst(MI) || HII->isJumpR(MI) || HII->mayBeNewStore(MI); + return HII->isCondInst(MI) || HII->isJumpR(MI) || MI.isReturn() || + HII->mayBeNewStore(MI); } // Promote an instructiont to its .cur form. @@ -805,7 +806,7 @@ bool HexagonPacketizerList::canPromoteToDotNew(const MachineInstr &MI, // predicate .new if (RC == &Hexagon::PredRegsRegClass) - if (HII->isCondInst(MI) || HII->isJumpR(MI)) + if (HII->isCondInst(MI) || HII->isJumpR(MI) || MI.isReturn()) return HII->predCanBeUsedAsDotNew(PI, DepReg); if (RC != &Hexagon::PredRegsRegClass && !HII->mayBeNewStore(MI)) @@ -1307,7 +1308,7 @@ bool HexagonPacketizerList::isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) { RC = HRI->getMinimalPhysRegClass(DepReg); } - if (I.isCall() || HII->isJumpR(I) || HII->isTailCall(I)) { + if (I.isCall() || HII->isJumpR(I) || I.isReturn() || HII->isTailCall(I)) { if (!isRegDependence(DepType)) continue; if (!isCallDependent(I, DepType, SUJ->Succs[i].getReg())) |